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https://github.com/radareorg/radare2.git
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264 lines
7.5 KiB
C
264 lines
7.5 KiB
C
/* radare - LGPL - Copyright 2011-2012 - pancake */
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#include <r_core.h>
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/* We can not use some kind of structure type with
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* a string for each case, because some architectures (like ARM)
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* have several modes/alignement requirements.
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*/
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void r_core_hack_help(const RCore *core) {
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const char* help_msg[] = {
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"wao", " [op]", "performs a modification on current opcode",
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"wao", " nop", "nop current opcode",
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"wao", " jz", "make current opcode conditional (zero)",
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"wao", " jnz", "make current opcode conditional (not zero)",
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"wao", " ret1", "make the current opcode return 1",
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"wao", " ret0", "make the current opcode return 0",
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"wao", " retn", "make the current opcode return -1",
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"wao", " nocj", "remove conditional operation from branch (make it unconditional)",
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"wao", " trap", "make the current opcode a trap",
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"wao", " recj", "reverse (swap) conditional branch instruction",
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"NOTE:", "", "those operations are only implemented for x86 and arm atm.", //TODO
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NULL
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};
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r_core_cmd_help (core, help_msg);
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}
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R_API bool r_core_hack_arm64(RCore *core, const char *op, const RAnalOp *analop) {
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if (!strcmp (op, "nop")) {
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r_core_cmdf (core, "wx 1f2003d5");
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} else if (!strcmp (op, "ret")) {
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r_core_cmdf (core, "wx c0035fd6t");
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} else if (!strcmp (op, "trap")) {
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r_core_cmdf (core, "wx 000020d4");
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} else if (!strcmp (op, "jz")) {
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eprintf ("ARM jz hack not supported\n");
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return false;
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} else if (!strcmp (op, "jnz")) {
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eprintf ("ARM jnz hack not supported\n");
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return false;
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} else if (!strcmp (op, "nocj")) {
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eprintf ("ARM jnz hack not supported\n");
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return false;
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} else if (!strcmp (op, "recj")) {
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eprintf ("TODO: use jnz or jz\n");
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return false;
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} else if (!strcmp (op, "ret1")) {
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r_core_cmdf (core, "wa mov x0, 1,,ret");
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} else if (!strcmp (op, "ret0")) {
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r_core_cmdf (core, "wa mov x0, 0,,ret");
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} else if (!strcmp (op, "retn")) {
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r_core_cmdf (core, "wa mov x0, -1,,ret");
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} else {
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eprintf ("Invalid operation '%s'\n", op);
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return false;
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}
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return true;
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}
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R_API bool r_core_hack_arm(RCore *core, const char *op, const RAnalOp *analop) {
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const int bits = core->assembler->bits;
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const ut8 *b = core->block;
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if (!strcmp (op, "nop")) {
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const int nopsize = (bits==16)? 2: 4;
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const char *nopcode = (bits==16)? "00bf":"0000a0e1";
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const int len = analop->size;
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char* str;
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int i;
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if (len % nopsize) {
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eprintf ("Invalid nopcode size\n");
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return false;
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}
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str = calloc (len + 1, 2);
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if (!str) {
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return false;
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}
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for (i=0; i < len; i+=nopsize) {
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memcpy (str + i * 2, nopcode, nopsize*2);
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}
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str[len*2] = '\0';
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r_core_cmdf (core, "wx %s\n", str);
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free (str);
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} else if (!strcmp (op, "trap")) {
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const char* trapcode = (bits==16)? "bebe": "fedeffe7";
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r_core_cmdf (core, "wx %s\n", trapcode);
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} else if (!strcmp (op, "jz")) {
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if (bits == 16) {
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switch (b[1]) {
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case 0xb9: // CBNZ
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r_core_cmd0 (core, "wx b1 @@ $$+1\n"); //CBZ
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break;
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case 0xbb: // CBNZ
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r_core_cmd0 (core, "wx b3 @@ $$+1\n"); //CBZ
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break;
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case 0xd1: // BNE
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r_core_cmd0 (core, "wx d0 @@ $$+1\n"); //BEQ
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break;
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default:
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else {
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eprintf ("ARM jz hack not supported\n");
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return false;
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}
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} else if (!strcmp (op, "jnz")) {
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if (bits == 16) {
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switch (b[1]) {
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case 0xb1: // CBZ
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r_core_cmd0 (core, "wx b9 @@ $$+1\n"); //CBNZ
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break;
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case 0xb3: // CBZ
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r_core_cmd0 (core, "wx bb @@ $$+1\n"); //CBNZ
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break;
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case 0xd0: // BEQ
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r_core_cmd0 (core, "wx d1 @@ $$+1\n"); //BNE
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break;
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default:
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else {
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eprintf ("ARM jnz hack not supported\n");
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return false;
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}
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} else if (!strcmp (op, "nocj")) {
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// TODO: drop conditional bit instead of that hack
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if (bits == 16) {
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switch (b[1]) {
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case 0xb1: // CBZ
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case 0xb3: // CBZ
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case 0xd0: // BEQ
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case 0xb9: // CBNZ
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case 0xbb: // CBNZ
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case 0xd1: // BNE
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r_core_cmd0 (core, "wx e0 @@ $$+1\n"); //BEQ
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break;
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default:
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else {
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eprintf ("ARM un-cjmp hack not supported\n");
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return false;
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}
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} else if (!strcmp (op, "recj")) {
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eprintf ("TODO: use jnz or jz\n");
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return false;
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} else if (!strcmp (op, "ret1")) {
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if (bits == 16)
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r_core_cmd0 (core, "wx 01207047 @@ $$+1\n"); // mov r0, 1; bx lr
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else
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r_core_cmd0 (core, "wx 0100b0e31eff2fe1 @@ $$+1\n"); // movs r0, 1; bx lr
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} else if (!strcmp (op, "ret0")) {
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if (bits == 16)
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r_core_cmd0 (core, "wx 00207047 @@ $$+1\n"); // mov r0, 0; bx lr
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else
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r_core_cmd0 (core, "wx 0000a0e31eff2fe1 @@ $$+1\n"); // movs r0, 0; bx lr
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} else if (!strcmp (op, "retn")) {
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if (bits == 16)
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r_core_cmd0 (core, "wx ff207047 @@ $$+1\n"); // mov r0, -1; bx lr
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else
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r_core_cmd0 (core, "wx ff00a0e31eff2fe1 @@ $$+1\n"); // movs r0, -1; bx lr
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} else {
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eprintf ("Invalid operation\n");
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return false;
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}
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return true;
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}
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R_API bool r_core_hack_x86(RCore *core, const char *op, const RAnalOp *analop) {
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const ut8 *b = core->block;
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int i, size = analop->size;
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if (!strcmp (op, "nop")) {
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if (size * 2 + 1 < size) return false;
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char *str = malloc (size * 2 + 1);
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if (!str) {
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return false;
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}
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for (i = 0; i < size; i++)
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memcpy (str + (i * 2), "90", 2);
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str[size*2] = '\0';
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r_core_cmdf (core, "wx %s\n", str);
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free (str);
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} else if (!strcmp (op, "trap")) {
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r_core_cmd0 (core, "wx cc\n");
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} else if (!strcmp (op, "jz")) {
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if (b[0] == 0x75) {
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r_core_cmd0 (core, "wx 74\n");
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} else {
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else if (!strcmp (op, "jnz")) {
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if (b[0] == 0x74) {
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r_core_cmd0 (core, "wx 75\n");
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} else {
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else if (!strcmp (op, "nocj")) {
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if (*b == 0xf) {
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r_core_cmd0 (core, "wx 90e9");
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} else if (b[0] >= 0x70 && b[0] <= 0x7f) {
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r_core_cmd0 (core, "wx eb");
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} else {
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eprintf ("Current opcode is not conditional\n");
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return false;
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}
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} else if (!strcmp (op, "recj")) {
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int is_near = (*b == 0xf);
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if (b[0] < 0x80 && b[0] >= 0x70) { // short jmps: jo, jno, jb, jae, je, jne, jbe, ja, js, jns
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r_core_cmdf (core, "wx %x\n", (b[0]%2)? b[0] - 1: b[0] + 1);
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} else if (is_near && b[1] < 0x90 && b[1] >= 0x80) { // near jmps: jo, jno, jb, jae, je, jne, jbe, ja, js, jns
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r_core_cmdf (core, "wx 0f%x\n", (b[1]%2)? b[1] - 1: b[1] + 1);
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} else {
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eprintf ("Invalid conditional jump opcode\n");
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return false;
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}
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} else if (!strcmp (op, "ret1")) {
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r_core_cmd0 (core, "wx c20100\n");
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} else if (!strcmp (op, "ret0")) {
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r_core_cmd0 (core, "wx c20000\n");
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} else if (!strcmp (op, "retn")) {
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r_core_cmd0 (core, "wx c2ffff\n");
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} else {
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eprintf ("Invalid operation '%s'\n", op);
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return false;
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}
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return true;
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}
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R_API int r_core_hack(RCore *core, const char *op) {
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bool (*hack)(RCore *core, const char *op, const RAnalOp *analop) = NULL;
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const char *asmarch = r_config_get (core->config, "asm.arch");
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const int asmbits = core->assembler->bits;
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if (!asmarch) {
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return false;
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}
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if (strstr (asmarch, "x86")) {
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hack = r_core_hack_x86;
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} else if (strstr (asmarch, "arm")) {
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if (asmbits == 64) {
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hack = r_core_hack_arm64;
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} else {
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hack = r_core_hack_arm;
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}
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} else {
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eprintf ("TODO: write hacks are only for x86\n");
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}
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if (hack) {
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RAnalOp analop;
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if (!r_anal_op (core->anal, &analop, core->offset, core->block, core->blocksize, R_ANAL_OP_MASK_BASIC)) {
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eprintf ("anal op fail\n");
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return false;
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}
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return hack (core, op, &analop);
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}
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return false;
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}
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