radare2/libr/asm/d/ppc
2014-01-04 02:15:24 +01:00

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# PPC
# r0 = call arg, return value
# r1 = stack pointer
# r2 = rtoc (register table of contents) (like a5 68k reg, not used, global to func (if i dont call a func))
# r3-r10 - general purpose registers
add=Add
addc=Add Carrying
adde=Add Extended
addi=Add Immediate
addic=Add Immediate Carrying
addic=Add Immediate Carrying and Record ; addic r3, r3, 1
addis=Add Immediate Shifted
addme=Add to Minus One Extended
addze=Add to Zero Extended
and=AND
andc=AND with Complement
andi=AND Immediate
andis=AND Immediate Shifted
b=Branch
bc=Branch Conditional
bcctr=Branch Conditional to Count Register
bclr=Branch Conditional Link Register
bctr=Branch to counter register
cmp=Compare
cmpi=Compare Immediate
cmpl=Compare Logical
cmpli=Compare Logical Immediate
cmplw=compare logical word; cmplwi CR0, r0, 33(unsigned)
cmplwi=compare logical word against int; cmplwi CR0, r0, 33(unsigned)
cmpw=compare word; cmpw CR0, r0, r1 (signed)
cntlzd=Count Leading Zeros Doubleword
cntlzw=Count Leading Zeros Word
crand=Condition Register AND
crandc=Condition Register AND with Complement
creqv=Condition Register Equivalent
crnand=Condition Register NAND
crnor=Condition Register NOR
cror=Condition Register OR
crorc=Condition Register OR with Complement
crxor=Condition Register XOR
dbnz=Decrement counter and branch if not zero
dbz=Decrement counter and branch if zero
dcbf=Data Cache Block Flush
dcbi=Data Cache Block Invalidate
dcbst=Data Cache Block Store
dcbt=Data Cache Block Touch
dcbtst=Data Cache Block Touch for Store
dcbz=Data Cache Block Set to Zero
divd=Divide Doubleword
divdu=Divide Doubleword Unsigned
divw=Divide Word
divwu=Divide Word Unsigned
eciwx=External Control in Word Indexed (opt)
ecowx=External Control out Word Indexed (opt)
eieio=Enforce In-order Execution of I/O
eqv=Equivalent
extsb=Extend Sign Byte
extsh=Extend Sign Halfword
extsw=Extend Sign Word
fabs=Floating Absolute Value
fadd=Floating Add
fadds=Floating Add Single
fcfid=Floating Convert from Integer Doubleword
fcmpo=Floating Compare Ordered
fcmpu=Floating Compare Unordered
fctid=Floating Convert to Integer Doubleword
fctidz=Floating Convert to Integer Doubleword with Round Toward Zero
fctiw=Floating Convert to Integer Word
fctiwz=Floating Convert to Integer Word with Round to Zero
fdiv=Floating Divide
fdivs=Floating Divide Single
fmadd=Floating Multiply-Add
fmadds=Floating Multiply-Add Single
fmr=Floating Move Register
fmsub=Floating Multiply-Subtract
fmsubs=Floating Multiply-Subtract Single
fmul=Floating Multiply
fmuls=Floating Multiply Single
fnabs=Floating Negative Absolute Value
fneg=Floating Negate
fnmadd=Floating Negative Multiply-Add
fnmadds=Floating Negative Multiply-Add Single
fnmsub=Floating Negative Multiply-Subtract
fnmsubs=Floating Negative Multiply-Subtract Single
fres=Floating Reciprocal Estimate Single (optional)
frsp=Floating Round to Single Precision
frsqrte=Floating Reciprocal Square Root Estimate (optional)
fsel=Floating-Point Select (optional)
fsub=Floating Subtract
fsubs=Floating Subtract Single
icbi=Instruction Cache Block Invalidate
isync=Instruction Synchronize
lbz=Load Byte and Zero
lbzu=Load Byte and Zero with Update
lbzux=Load Byte and Zero with Update Indexed
lbzx=Load Byte and Zero Indexed
ld=Load Doubleword
ldarx=Load Doubleword and Reserve Indexed
ldu=Load Doubleword with Update
ldux=Load Doubleword with Update Indexed
ldx=Load Doubleword Indexed
lfd=Load Floating-Point Double
lfdu=Load Floating-Point Double with Update
lfdux=Load Floating-Point Double with Update Indexed
lfdx=Load Floating-Point Double Indexed
lfs=Load Floating-Point Single
lfsu=Load Floating-Point Single with Update
lfsux=Load Floating-Point Single with Update Indexed
lfsx=Load Floating-Point Single Indexed
lha=Load Half Algebraic
lhau=Load Half Algebraic with Update
lhaux=Load Half Algebraic with Update Indexed
lhax=Load Half Algebraic Indexed
lhbrx=Load Half Byte-Reversed Indexed
lhz=Load Half and Zero
lhzu=Load Half and Zero with Update
lhzux=Load Half and Zero with Update Indexed
lhzx=Load Half and Zero Indexed
li=load integer into register; li r3, 1
lmw=Load Multiple Word
lswi=Load String Word Immediate
lswx=Load String Word Indexed
lwa=Load Word Algebraic
lwarx=Load Word and Reserve Indexed
lwaux=Load Word Algebraic with Update Indexed
lwax=Load Word Algebraic Indexed
lwbrx=Load Word Byte-Reversed Indexed
lwz=Load Word and Zero
lwzu=Load Word with Zero Update
lwzux=Load Word and Zero with Update Indexed
lwzx=Load Word and Zero Indexed
mcrf=Move Condition Register Field
mcrfs=Move to Condition Register from FPSCR
mcrxr=Move to Condition Register from XER
mfcr=Move from Condition Register
mffs=Move from FPSCR
mfmsr=Move from Machine State Register
mfspr=Move from Special-Purpose Register
mfsr=Move from Segment Register
mfsrin=Move from Segment Register Indirect
mtctr=Preload count register (???)
mtcrf=Move to Condition Register Fields
mtfsb0=Move to FPSCR Bit 0
mtfsb1=Move to FPSCR Bit 1
mtfsf=Move to FPSCR Fields
mtfsfi=Move to FPSCR Field Immediate
mtmsr=Move to Machine State Register
mtspr=Move to Special-Purpose Register
mtsr=Move to Segment Register
mtsrin=Move to Segment Register Indirect
mulhd=Multiply High Doubleword
mulhdu=Multiply High Doubleword Unsigned
mulhw=Multiply High Word
mulhwu=Multiply High Word Unsigned
mulld=Multiply Low Doubleword
mulli=Multiply Low Immediate
mullw=Multiply Low Word
nand=NAND
neg=Negate
nor=NOR
or=OR
orc=OR with Complement
ori=OR Immediate
oris=OR Immediate Shifted
rfi=Return from Interrupt
rldcl=Rotate Left Doubleword then Clear Left
rldcr=Rotate Left Doubleword then Clear Right
rldic=Rotate Left Doubleword Immediate then Clear
rldicl=Rotate Left Doubleword Immediate then Clear Left
rldicr=Rotate Left Doubleword Immediate then Clear Right
rldimi=Rotate Left Doubleword Immediate then Mask Insert
rlwimi=Rotate Left Word Immediate then Mask Insert
rlwinm=Rotate Left Word Immediate then AND with Mask
rlwnm=Rotate Left Word then AND with Mask
sc=System Call
si=Subtract Immediate
si=Subtract Immediate and Record
slbia=SLB Invalidate All
slbie=SLB Invalidate Entry
sld=Shift Left Doubleword
slw=Shift Left Word
srad=Shift Right Algebraic Doubleword
sradi=Shift Right Algebraic Doubleword Immediate
srd=Shift Right Doubleword
sraw=Shift Right Algebraic Word
srawi=Shift Right Algebraic Word Immediate
srw=Shift Right Word
stb=Store Byte
stbu=Store Byte with Update
stbux=Store Byte with Update Indexed
stbx=Store Byte Indexed
std=Store Doubleword
stdcx=Store Doubleword Conditional Indexed
stdu=Store Doubleword with Update
stdux=Store Doubleword with Update Indexed
stdx=Store Doubleword Indexed
stfd=Store Floating-Point Double
stfdu=Store Floating-Point Double with Update
stfdux=Store Floating-Point Double with Update Indexed
stfdx=Store Floating-Point Double Indexed
stfiwx=Store Floating-Point as Integer Word Indexed (optional)
stfs=Store Floating-Point Single
stfsu=Store Floating-Point Single with Update
stfsux=Store Floating-Point Single with Update Indexed
stfsx=Store Floating-Point Single Indexed
sth=Store Half
sthbrx=Store Half Byte-Reverse Indexed
sthu=Store Half with Update
sthux=Store Half with Update Indexed
sthx=Store Half Indexed
stmw=Store Multiple Word
stswi=Store String Word Immediate
stswx=Store String Word Indexed
stw=Store
stwbrx=Store Word Byte-Reversed Indexed
stwcx=Store Word Conditional Indexed
stwu=Store Word with Update
stwux=Store Word with Update Indexed
stwx=Store Word Indexed
subf=Subtract from
subfc=Subtract from Carrying
subfe=Subtract from Extended
subfic=Subtract from Immediate Carrying
subfme=Subtract from Minus One Extended
subfze=Subtract from Zero Extended
svc=The svc instruction generates a supervisor call interrupt and places
sync=Synchronize
td=Trap Doubleword
tdi=Trap Doubleword Immediate
tlbie=Translation Look-aside Buffer Invalidate Entry (optional)
tlbsync=Translation Look-aside Buffer Synchronize (optional)
tw=Trap Word
twi=Trap Word Immediate
xor=XOR
xori=XOR Immediate
xoris=XOR Immediate Shift