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53 lines
3.3 KiB
Plaintext
53 lines
3.3 KiB
Plaintext
add=adds two registers, trap on overflow
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addi=add sign-extended constants (or copy one register to another: addi $1, $2, 0), trap on overflow
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addiu=add sign-extended constants (or copy one register to another: addi $1, $2, 0)
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addu=adds two registers
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and=bitwise and
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andi=bitwise and, leftmost 16 bits are padded with 0s
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beq=beq $s,$t,C, goes to the instruction at the specified address if two registers are equal.
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blez=branch if the register is less than or equal to zero.
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bneq=goes to the instruction at the specified address if two registers are not equal.
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cache=perform cache operation.
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div=divides two registers and puts the 32-bit integer result in LO and the remainder in HI.
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divu=divides two registers and puts the 32-bit integer result in LO and the remainder in HI.
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j=unconditionally jumps to the instruction at the specified address
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jal=used to call a subroutine, $31 holds the return address; returning from a subroutine is done by: jr $31. Return address is PC + 8, not PC + 4 due to the use of a branch delay slot which forces the instruction after the jump to be executed
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jr=jumps to the address contained in the specified register
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jraddiusp=increment stackpointer and jump to ra register
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li=load immediate (pseudoinstruction)
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lb=lb $t,C($s), loads the byte stored from: MEM[$s+C], sign is extended to width of register
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lh=lh $t,C($s), loads the halfword stored from: MEM[$s+C] and the following byte, sign is extended to width of register.
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lhu=lhu $t,C($s), loads the halfword stored from: MEM[$s+C] and the following byte.
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lui=loads a 16-bit immediate operand into the upper 16-bits of the register specified.
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lw=lw $t,C($s), loads the word stored from: MEM[$s+C] and the following 3 bytes.
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mfcZ=moves a 4 byte value from Coprocessor Z Control register to a general purpose register. Sign extension.
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mfhi=moves a value from HI to a register
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mflo=moves a value from LO to a register
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move=moves a register value into another register (pseudoinstruction).
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movn=conditional move.
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movz=conditional move.
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mtcZ=moves a 4 byte value from a general purpose register to a Coprocessor Z Control register. Sign extension.
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mult=int HI, int LO = (64-bit) $s * $t, trap on overflow
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multu=int HI, int LO = (64-bit) $s * $t
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nop=no operation
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nor=bitwise nor
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or=bitwise or
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ori=bitwise or, leftmost 16 bits are padded with 0s
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sb=sb $t,C($s), stores the least-significant 8-bit of a register (a byte) into: MEM[$s+C].
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sc=store a word to memory.
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sh=sh $t,C($s), stores the least-significant 16-bit of a register (a halfword) into: MEM[$s+C].
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sll=sll $d,$t,shamt, shifts shamt number of bits to the left (multiply but 2^n)
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sllv=sllv $d,$t,$s, shifts $s number of bits to the left
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slt=tests if one register is less than another.
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slti=tests if one register is less than a constant.
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sltu=tests if one register is less than an unsigned constant.
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sra=sda $d,$t,shamt, shifts shamt number of bits - the sign bit is shifted in
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srav=srav $d,$t,$s, shifts $s number of bits - the sign bit is shifted in
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srl=srl $d,$t,shamt, shifts shamt number of bits to the right - zeros are shifted in.
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srlv=srlv $d,$t,$s, shifts $s number of bits to the right - zeros are shifted in
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sub=subtracts two registers, trap on overflow
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subu=subtracts two registers
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sw=sw $t,C($s), stores a word into: MEM[$s+C] and the following 3 bytes.
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xor=bitwise xor
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xori=bitwise xor with a constant
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