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236 lines
7.8 KiB
Plaintext
236 lines
7.8 KiB
Plaintext
# PPC
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# r0 = call arg, return value
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# r1 = stack pointer
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# r2 = rtoc (register table of contents) (like a5 68k reg, not used, global to func (if i dont call a func))
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# r3-r10 - general purpose registers
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add=Add
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addc=Add Carrying
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adde=Add Extended
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addi=Add Immediate
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addic=Add Immediate Carrying
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addic=Add Immediate Carrying and Record ; addic r3, r3, 1
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addis=Add Immediate Shifted
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addme=Add to Minus One Extended
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addze=Add to Zero Extended
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and=AND
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andc=AND with Complement
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andi=AND Immediate
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andis=AND Immediate Shifted
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b=Branch
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bc=Branch Conditional
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bcctr=Branch Conditional to Count Register
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bclr=Branch Conditional Link Register
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bctr=Branch to counter register
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cmp=Compare
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cmpi=Compare Immediate
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cmpl=Compare Logical
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cmpli=Compare Logical Immediate
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cmplw=compare logical word; cmplwi CR0, r0, 33(unsigned)
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cmplwi=compare logical word against int; cmplwi CR0, r0, 33(unsigned)
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cmpw=compare word; cmpw CR0, r0, r1 (signed)
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cntlzd=Count Leading Zeros Doubleword
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cntlzw=Count Leading Zeros Word
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crand=Condition Register AND
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crandc=Condition Register AND with Complement
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creqv=Condition Register Equivalent
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crnand=Condition Register NAND
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crnor=Condition Register NOR
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cror=Condition Register OR
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crorc=Condition Register OR with Complement
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crxor=Condition Register XOR
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dbnz=Decrement counter and branch if not zero
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dbz=Decrement counter and branch if zero
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dcbf=Data Cache Block Flush
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dcbi=Data Cache Block Invalidate
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dcbst=Data Cache Block Store
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dcbt=Data Cache Block Touch
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dcbtst=Data Cache Block Touch for Store
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dcbz=Data Cache Block Set to Zero
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divd=Divide Doubleword
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divdu=Divide Doubleword Unsigned
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divw=Divide Word
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divwu=Divide Word Unsigned
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eciwx=External Control in Word Indexed (opt)
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ecowx=External Control out Word Indexed (opt)
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eieio=Enforce In-order Execution of I/O
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eqv=Equivalent
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extsb=Extend Sign Byte
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extsh=Extend Sign Halfword
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extsw=Extend Sign Word
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fabs=Floating Absolute Value
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fadd=Floating Add
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fadds=Floating Add Single
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fcfid=Floating Convert from Integer Doubleword
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fcmpo=Floating Compare Ordered
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fcmpu=Floating Compare Unordered
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fctid=Floating Convert to Integer Doubleword
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fctidz=Floating Convert to Integer Doubleword with Round Toward Zero
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fctiw=Floating Convert to Integer Word
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fctiwz=Floating Convert to Integer Word with Round to Zero
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fdiv=Floating Divide
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fdivs=Floating Divide Single
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fmadd=Floating Multiply-Add
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fmadds=Floating Multiply-Add Single
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fmr=Floating Move Register
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fmsub=Floating Multiply-Subtract
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fmsubs=Floating Multiply-Subtract Single
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fmul=Floating Multiply
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fmuls=Floating Multiply Single
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fnabs=Floating Negative Absolute Value
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fneg=Floating Negate
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fnmadd=Floating Negative Multiply-Add
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fnmadds=Floating Negative Multiply-Add Single
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fnmsub=Floating Negative Multiply-Subtract
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fnmsubs=Floating Negative Multiply-Subtract Single
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fres=Floating Reciprocal Estimate Single (optional)
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frsp=Floating Round to Single Precision
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frsqrte=Floating Reciprocal Square Root Estimate (optional)
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fsel=Floating-Point Select (optional)
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fsub=Floating Subtract
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fsubs=Floating Subtract Single
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icbi=Instruction Cache Block Invalidate
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isync=Instruction Synchronize
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lbz=Load Byte and Zero
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lbzu=Load Byte and Zero with Update
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lbzux=Load Byte and Zero with Update Indexed
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lbzx=Load Byte and Zero Indexed
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ld=Load Doubleword
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ldarx=Load Doubleword and Reserve Indexed
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ldu=Load Doubleword with Update
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ldux=Load Doubleword with Update Indexed
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ldx=Load Doubleword Indexed
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lfd=Load Floating-Point Double
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lfdu=Load Floating-Point Double with Update
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lfdux=Load Floating-Point Double with Update Indexed
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lfdx=Load Floating-Point Double Indexed
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lfs=Load Floating-Point Single
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lfsu=Load Floating-Point Single with Update
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lfsux=Load Floating-Point Single with Update Indexed
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lfsx=Load Floating-Point Single Indexed
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lha=Load Half Algebraic
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lhau=Load Half Algebraic with Update
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lhaux=Load Half Algebraic with Update Indexed
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lhax=Load Half Algebraic Indexed
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lhbrx=Load Half Byte-Reversed Indexed
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lhz=Load Half and Zero
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lhzu=Load Half and Zero with Update
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lhzux=Load Half and Zero with Update Indexed
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lhzx=Load Half and Zero Indexed
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li=load integer into register; li r3, 1
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lmw=Load Multiple Word
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lswi=Load String Word Immediate
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lswx=Load String Word Indexed
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lwa=Load Word Algebraic
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lwarx=Load Word and Reserve Indexed
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lwaux=Load Word Algebraic with Update Indexed
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lwax=Load Word Algebraic Indexed
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lwbrx=Load Word Byte-Reversed Indexed
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lwz=Load Word and Zero
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lwzu=Load Word with Zero Update
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lwzux=Load Word and Zero with Update Indexed
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lwzx=Load Word and Zero Indexed
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mcrf=Move Condition Register Field
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mcrfs=Move to Condition Register from FPSCR
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mcrxr=Move to Condition Register from XER
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mfcr=Move from Condition Register
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mffs=Move from FPSCR
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mfmsr=Move from Machine State Register
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mfspr=Move from Special-Purpose Register
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mfsr=Move from Segment Register
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mfsrin=Move from Segment Register Indirect
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mtctr=Preload count register (???)
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mtcrf=Move to Condition Register Fields
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mtfsb0=Move to FPSCR Bit 0
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mtfsb1=Move to FPSCR Bit 1
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mtfsf=Move to FPSCR Fields
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mtfsfi=Move to FPSCR Field Immediate
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mtmsr=Move to Machine State Register
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mtspr=Move to Special-Purpose Register
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mtsr=Move to Segment Register
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mtsrin=Move to Segment Register Indirect
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mulhd=Multiply High Doubleword
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mulhdu=Multiply High Doubleword Unsigned
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mulhw=Multiply High Word
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mulhwu=Multiply High Word Unsigned
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mulld=Multiply Low Doubleword
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mulli=Multiply Low Immediate
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mullw=Multiply Low Word
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nand=NAND
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neg=Negate
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nor=NOR
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or=OR
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orc=OR with Complement
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ori=OR Immediate
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oris=OR Immediate Shifted
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rfi=Return from Interrupt
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rldcl=Rotate Left Doubleword then Clear Left
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rldcr=Rotate Left Doubleword then Clear Right
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rldic=Rotate Left Doubleword Immediate then Clear
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rldicl=Rotate Left Doubleword Immediate then Clear Left
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rldicr=Rotate Left Doubleword Immediate then Clear Right
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rldimi=Rotate Left Doubleword Immediate then Mask Insert
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rlwimi=Rotate Left Word Immediate then Mask Insert
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rlwinm=Rotate Left Word Immediate then AND with Mask
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rlwnm=Rotate Left Word then AND with Mask
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sc=System Call
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si=Subtract Immediate
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si=Subtract Immediate and Record
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slbia=SLB Invalidate All
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slbie=SLB Invalidate Entry
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sld=Shift Left Doubleword
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slw=Shift Left Word
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srad=Shift Right Algebraic Doubleword
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sradi=Shift Right Algebraic Doubleword Immediate
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srd=Shift Right Doubleword
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sraw=Shift Right Algebraic Word
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srawi=Shift Right Algebraic Word Immediate
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srw=Shift Right Word
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stb=Store Byte
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stbu=Store Byte with Update
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stbux=Store Byte with Update Indexed
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stbx=Store Byte Indexed
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std=Store Doubleword
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stdcx=Store Doubleword Conditional Indexed
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stdu=Store Doubleword with Update
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stdux=Store Doubleword with Update Indexed
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stdx=Store Doubleword Indexed
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stfd=Store Floating-Point Double
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stfdu=Store Floating-Point Double with Update
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stfdux=Store Floating-Point Double with Update Indexed
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stfdx=Store Floating-Point Double Indexed
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stfiwx=Store Floating-Point as Integer Word Indexed (optional)
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stfs=Store Floating-Point Single
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stfsu=Store Floating-Point Single with Update
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stfsux=Store Floating-Point Single with Update Indexed
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stfsx=Store Floating-Point Single Indexed
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sth=Store Half
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sthbrx=Store Half Byte-Reverse Indexed
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sthu=Store Half with Update
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sthux=Store Half with Update Indexed
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sthx=Store Half Indexed
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stmw=Store Multiple Word
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stswi=Store String Word Immediate
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stswx=Store String Word Indexed
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stw=Store
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stwbrx=Store Word Byte-Reversed Indexed
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stwcx=Store Word Conditional Indexed
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stwu=Store Word with Update
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stwux=Store Word with Update Indexed
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stwx=Store Word Indexed
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subf=Subtract from
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subfc=Subtract from Carrying
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subfe=Subtract from Extended
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subfic=Subtract from Immediate Carrying
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subfme=Subtract from Minus One Extended
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subfze=Subtract from Zero Extended
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svc=The svc instruction generates a supervisor call interrupt and places
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sync=Synchronize
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td=Trap Doubleword
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tdi=Trap Doubleword Immediate
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tlbie=Translation Look-aside Buffer Invalidate Entry (optional)
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tlbsync=Translation Look-aside Buffer Synchronize (optional)
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tw=Trap Word
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twi=Trap Word Immediate
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xor=XOR
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xori=XOR Immediate
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xoris=XOR Immediate Shift |