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capstone2llvmir/x86: generate BND registers
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@ -526,6 +526,12 @@ void Capstone2LlvmIrTranslatorX86_impl::generateRegistersCommon()
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createRegister(X86_REG_ZMM30, _regLt);
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createRegister(X86_REG_ZMM31, _regLt);
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// BND
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createRegister(X86_REG_BND0, _regLt);
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createRegister(X86_REG_BND1, _regLt);
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createRegister(X86_REG_BND2, _regLt);
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createRegister(X86_REG_BND3, _regLt);
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// Debug registers.
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//
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createRegister(X86_REG_DR0, _regLt);
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@ -370,6 +370,12 @@ void Capstone2LlvmIrTranslatorX86_impl::initializeRegTypeMap()
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{X86_REG_ZMM30, i512},
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{X86_REG_ZMM31, i512},
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// BND
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{X86_REG_BND0, i128},
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{X86_REG_BND1, i128},
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{X86_REG_BND2, i128},
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{X86_REG_BND3, i128},
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// x86_reg_rflags
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//
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{X86_REG_CF, i1},
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