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[GH-ISSUE #3063] [DOCS]: Perform a vector similarity search in a workspace #1963

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opened 2026-02-22 18:27:26 -05:00 by yindo · 4 comments
yindo commented 2026-02-22 18:27:26 -05:00
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Originally created by @emad-qadri on GitHub (Jan 30, 2025).
Original GitHub issue: https://github.com/Mintplex-Labs/anything-llm/issues/3063

Originally assigned to: @timothycarambat on GitHub.

Description

Perform a vector similarity search in a workspace - http://localhost:3001/api/v1/workspace/slug/vector-search

I am trying to Perform a vector similarity search in a workspace with a small code base embedded (DB: LanceDB). Below is the request and response (in-part). I am not able to figure out the relation between "scoreThreshold" parameter in request and "score" in response. Are they same/ different? How are they correlated?

if my scoreThreshold is 0.25; why am I getting a result chuck with score 0.000029567665478680283?

REQUEST

{
"query": "what function implements the antenna switch based on 5g?",
"topN": 6,
"scoreThreshold": 0.25
}

RESPONSE

{
"id": "96cda555-1687-401d-b39e-e32867f50776",
"text": "<document_metadata>\nsourceDocument: hal/btc/halbtc8822b1ant.c\npublished: 1/28/2025, 7:24:59 PM\n</document_metadata>\n\n/* rf4 type by efuse, and for ant at main aux inverse use,\n * because is 2x2, and control types are the same, does not need\n */\nstatic void halbtc8822b1ant_set_rfe_type(struct btc_coexist *btc)\n{\n\tstruct rfe_type_8822b_1ant rfe_type = &btc->rfe_type_8822b_1ant;\n\tstruct btc_board_info board_info = &btc->board_info;\n\n\t/ Ext switch buffer mux /\n\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t/ the following setup should be got from Efuse in the future /\n\trfe_type->rfe_module_type = board_info->rfe_type;\n\n\trfe_type->ext_switch_polarity = 0;\n\trfe_type->ext_switch_exist = TRUE;\n\trfe_type->ext_switch_type = BT_8822B_1ANT_SWITCH_USE_SPDT;\n}\n\n/anttenna control by bb mac bt antdiv pta to write 0x4c 0xcb4,0xcbd/\n\nstatic\nvoid hallbtc8822b1ant_set_ant_switch(struct btc_coexist btc,\n\t\t\t\t boolean force_exec, u8 ctrl_type,\n\t\t\t\t u8 pos_type)\n{\n\tstruct coex_dm_8822b_1ant coex_dm = &btc->coex_dm_8822b_1ant;\n\tstruct rfe_type_8822b_1ant rfe_type = &btc->rfe_type_8822b_1ant;\n\tboolean polarity_inverse;\n\tu8 regval = 0;\n\n\tif (!rfe_type->ext_switch_exist)\n\t\treturn;\n\n\tif (!force_exec) {\n\t\tif (((ctrl_type << 8) + pos_type) == coex_dm->cur_switch_status)\n\t\t\treturn;\n\t}\n\n\tcoex_dm->cur_switch_status = (ctrl_type << 8) + pos_type;\n\n\t/ swap control polarity if use different switch control polarity/\n\t/ Normal switch polarity for SPDT,\n\t * 0xcbd[1:0] = 2b'01 => Ant to BTG, WLA\n\t * 0xcbd[1:0] = 2b'10 => Ant to WLG\n\t /\n\tpolarity_inverse = (rfe_type->ext_switch_polarity == 1);\n\n\tif (rfe_type->ext_switch_type ==\n\t BT_8822B_1ANT_SWITCH_USE_SPDT) {\n\t\tswitch (ctrl_type) {\n\t\tdefault:\n\t\tcase BT_8822B_1ANT_CTRL_BY_BBSW:\n\t\t\t/ 0x4c[23] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/ 0x4c[24] = 1 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\t/ BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin/\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x77);\n\n\t\t\t/ 0xcbd[1:0] = 2b'01 for no switch_polarity_inverse,\n\t\t\t * ANTSWB =1, ANTSW =0\n\t\t\t /\n\t\t\tif (pos_type == BT_8822B_1ANT_TO_S0WLG_S1BT)\n\t\t\t\tregval = 0x3;\n\t\t\telse if (pos_type == BT_8822B_1ANT_TO_WLG)\n\t\t\t\tregval = (!polarity_inverse ? 0x2 : 0x1);\n\t\t\telse\n\t\t\t\tregval = (!polarity_inverse ? 0x1 : 0x2);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbd, 0x3, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_PTA:\n\t\t\t/ 0x4c[23] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/ 0x4c[24] = 1 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\t/ PTA, DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x66);\n\n\t\t\t/ 0xcbd[1:0] = 2b'10 for no switch_polarity_inverse,\n\t\t\t * ANTSWB =1, ANTSW =0 @ GNT_BT=1\n\t\t\t /\n\t\t\tregval = (!polarity_inverse ? 0x2 : 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbd, 0x3, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_ANTDIV:\n\t\t\t/ 0x4c[23] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/ 0x4c[24] = 1 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x88);\n\n\t\t\t/ no regval_0xcbd setup required, because\n\t\t\t * antenna switch control value by antenna diversity\n\t\t\t /\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_MAC:\n\t\t\t/ 0x4c[23] = 1 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x1);\n\n\t\t\t/ 0x64[0] = 1b'0 for no switch_polarity_inverse,\n\t\t\t * DPDT_SEL_N =1, DPDT_SEL_P =0\n\t\t\t /\n\t\t\tregval = (!polarity_inverse ? 0x0 : 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x64, 0x1, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_FW:\n\t\t\t/ 0x4c[23] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/ 0x4c[24] = 1 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_BT:\n\t\t\t/ 0x4c[23] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/ 0x4c[24] = 0 /\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x0);\n\n\t\t\t/ no setup required, because antenna switch control\n\t\t\t * value by BT vendor 0xac[1:0]\n\t\t\t /\n\t\t\tbreak;\n\t\t}\n\t}\n}\n\n/ set gnt_wl gnt_bt control by sw high low, or\n * hwpta while in power on, ini, wlan off, wlan only, wl2g non-currrent,\n * wl2g current, wl5g\n */\n\nstatic\nvoid halbtc8822b1ant_set_ant_path(struct btc_coexist *btc,\n\t\t\t\t u8 ant_pos_type, boolean force_exec,\n\t\t\t\t u8 phase)\n{\n\tstruct coex_sta_8822b_1ant *coex_sta = &btc->coex_sta_8822b_1ant;\n\tstruct coex_dm_8822b_1ant coex_dm = &btc->coex_dm_8822b_1ant;\n\tu32 u32tmp1 = 0, u32tmp2 = 0;\n\tu8 u8tmp = 0, ctrl_type, pos_type;\n\tu8 wl_ctrl, wl_state;\n\tu8 bt_ctrl, bt_state;\n\n\tif (!force_exec) {\n\t\tif (coex_dm->cur_ant_pos_type == ((ant_pos_type << 8) + phase))\n\t\t\treturn;\n\t}\n\n\tcoex_dm->cur_ant_pos_type = (ant_pos_type << 8) + phase;\n\n\tif (btc->dbg_mode) {\n\t\tu32tmp1 = btc->btc_read_4byte(btc, 0xcbc);\n\t\tu32tmp2 = btc->btc_read_4byte(btc, 0xcb4);\n\t\tu8tmp = btc->btc_read_1byte(btc, 0x73);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t "[BTCoex], (Before Ant Setup) 0xcb4 = 0x%x, 0xcbc = 0x%x, 0x73 = 0x%x\n",\n\t\t\t u32tmp1, u32tmp2, u8tmp);\n\t\tBTC_TRACE(trace_buf);\n\t}\n\n\tswitch (phase) {\n\tcase BT_8822B_1ANT_PHASE_POWERON:\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t "[BTCoex], set_ant_path - 1ANT_PHASE_COEX_POWERON\n");\n\t\tBTC_TRACE(trace_buf);\n\n\t\t/ set Path control owner to BT at power-on step /\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_BTSIDE);\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_BT;\n\n\t\tcoex_sta->run_time_state = FALSE;\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_INIT:\n\t\t/ Ext switch buffer mux /\n\t\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t "[BTCoex], set_ant_path - 1ANT_PHASE_COEX_INIT\n");\n\t\tBTC_TRACE(trace_buf);\n\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_WL_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_BT_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\t/ set GNT_BT to SW high /\n\t\thalbtc8822b1ant_set_gnt_bt(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_HIGH);\n\n\t\t/ set GNT_WL to SW low /\n\t\thalbtc8822b1ant_set_gnt_wl(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_LOW);\n\n\t\t/ set Path control owner to WL at initial step /\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_WLSIDE);\n\n\t\tcoex_sta->run_time_state = FALSE;\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_BT;\n\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_WONLY:\n\t\t/ Ext switch buffer mux /\n\t\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t "[BTCoex], set_ant_path - 1ANT_PHASE_WLANONLY_INIT\n");\n\t\tBTC_TRACE(trace_buf);\n\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_WL_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_BT_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\t/ set GNT_BT to SW Low /\n\t\thalbtc8822b1ant_set_gnt_bt(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_LOW);\n\n\t\t/ Set GNT_WL to SW high /\n\t\thalbtc8822b1ant_set_gnt_wl(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_HIGH);\n\n\t\t/ set Path control owner to WL at initial step /\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_WLSIDE);\n\n\t\tcoex_sta->run_time_state = FALSE;\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_WIFI;\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_WOFF:\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t "[BTCoex], set_ant_path - 1ANT_PHASE_WLAN_OFF\n");\n\t\tBTC_TRACE(trace_buf);\n\n\t\t/ Disable LTE Coex Function in WiFi side */\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);",
"metadata": {
"url": "github://hal/btc/halbtc8822b1ant.c",
"title": "hal/btc/halbtc8822b1ant.c",
"author": "fastoe",
"description": "No description found.",
"docSource": "hal/btc/halbtc8822b1ant.c",
"chunkSource": "github://https://github.com/fastoe/RTL8812BU?payload=c033ed9af3ac85c53fa6ef0ce64f66bca28403125c36160816c164a2fdc8c20e4ef93913ee2bed280907335383c74215bf874aa8d28148e88bde8a223bb628a1213630aedd615c49f536108d05f10d3539f429f6a9bfe0046a76524fa3dd08cc20957aa977dcc866d1d95e3f3207ca7c457d427fbabc8731e8d0a1cf7176081430a5818096019e3bfe163feb5a185c8e:da8a6f218c3287d809c436b480c1db85",
"published": "1/28/2025, 7:24:59 PM",
"wordCount": 13906,
"tokenCount": 64907
},
"distance": 0.42097437381744385,
"score": 0.000029567665478680283
}
]
}

Originally created by @emad-qadri on GitHub (Jan 30, 2025). Original GitHub issue: https://github.com/Mintplex-Labs/anything-llm/issues/3063 Originally assigned to: @timothycarambat on GitHub. ### Description ### Perform a vector similarity search in a workspace - http://localhost:3001/api/v1/workspace/slug/vector-search I am trying to Perform a vector similarity search in a workspace with a small code base embedded (DB: LanceDB). Below is the request and response (in-part). I am not able to figure out the relation between "scoreThreshold" parameter in request and "score" in response. Are they same/ different? How are they correlated? if my scoreThreshold is 0.25; why am I getting a result chuck with score 0.000029567665478680283? **REQUEST** { "query": "what function implements the antenna switch based on 5g?", "topN": 6, "scoreThreshold": 0.25 } **RESPONSE** { "id": "96cda555-1687-401d-b39e-e32867f50776", "text": "<document_metadata>\nsourceDocument: hal/btc/halbtc8822b1ant.c\npublished: 1/28/2025, 7:24:59 PM\n</document_metadata>\n\n/* rf4 type by efuse, and for ant at main aux inverse use,\n * because is 2x2, and control types are the same, does not need\n */\nstatic void halbtc8822b1ant_set_rfe_type(struct btc_coexist *btc)\n{\n\tstruct rfe_type_8822b_1ant *rfe_type = &btc->rfe_type_8822b_1ant;\n\tstruct btc_board_info *board_info = &btc->board_info;\n\n\t/* Ext switch buffer mux */\n\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t/* the following setup should be got from Efuse in the future */\n\trfe_type->rfe_module_type = board_info->rfe_type;\n\n\trfe_type->ext_switch_polarity = 0;\n\trfe_type->ext_switch_exist = TRUE;\n\trfe_type->ext_switch_type = BT_8822B_1ANT_SWITCH_USE_SPDT;\n}\n\n/*anttenna control by bb mac bt antdiv pta to write 0x4c 0xcb4,0xcbd*/\n\nstatic\nvoid hallbtc8822b1ant_set_ant_switch(struct btc_coexist *btc,\n\t\t\t\t boolean force_exec, u8 ctrl_type,\n\t\t\t\t u8 pos_type)\n{\n\tstruct coex_dm_8822b_1ant *coex_dm = &btc->coex_dm_8822b_1ant;\n\tstruct rfe_type_8822b_1ant *rfe_type = &btc->rfe_type_8822b_1ant;\n\tboolean polarity_inverse;\n\tu8 regval = 0;\n\n\tif (!rfe_type->ext_switch_exist)\n\t\treturn;\n\n\tif (!force_exec) {\n\t\tif (((ctrl_type << 8) + pos_type) == coex_dm->cur_switch_status)\n\t\t\treturn;\n\t}\n\n\tcoex_dm->cur_switch_status = (ctrl_type << 8) + pos_type;\n\n\t/* swap control polarity if use different switch control polarity*/\n\t/* Normal switch polarity for SPDT,\n\t * 0xcbd[1:0] = 2b'01 => Ant to BTG, WLA\n\t * 0xcbd[1:0] = 2b'10 => Ant to WLG\n\t */\n\tpolarity_inverse = (rfe_type->ext_switch_polarity == 1);\n\n\tif (rfe_type->ext_switch_type ==\n\t BT_8822B_1ANT_SWITCH_USE_SPDT) {\n\t\tswitch (ctrl_type) {\n\t\tdefault:\n\t\tcase BT_8822B_1ANT_CTRL_BY_BBSW:\n\t\t\t/* 0x4c[23] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/* 0x4c[24] = 1 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\t/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin*/\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x77);\n\n\t\t\t/* 0xcbd[1:0] = 2b'01 for no switch_polarity_inverse,\n\t\t\t * ANTSWB =1, ANTSW =0\n\t\t\t */\n\t\t\tif (pos_type == BT_8822B_1ANT_TO_S0WLG_S1BT)\n\t\t\t\tregval = 0x3;\n\t\t\telse if (pos_type == BT_8822B_1ANT_TO_WLG)\n\t\t\t\tregval = (!polarity_inverse ? 0x2 : 0x1);\n\t\t\telse\n\t\t\t\tregval = (!polarity_inverse ? 0x1 : 0x2);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbd, 0x3, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_PTA:\n\t\t\t/* 0x4c[23] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/* 0x4c[24] = 1 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\t/* PTA, DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x66);\n\n\t\t\t/* 0xcbd[1:0] = 2b'10 for no switch_polarity_inverse,\n\t\t\t * ANTSWB =1, ANTSW =0 @ GNT_BT=1\n\t\t\t */\n\t\t\tregval = (!polarity_inverse ? 0x2 : 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbd, 0x3, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_ANTDIV:\n\t\t\t/* 0x4c[23] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/* 0x4c[24] = 1 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0xcb4, 0xff, 0x88);\n\n\t\t\t/* no regval_0xcbd setup required, because\n\t\t\t * antenna switch control value by antenna diversity\n\t\t\t */\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_MAC:\n\t\t\t/* 0x4c[23] = 1 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x1);\n\n\t\t\t/* 0x64[0] = 1b'0 for no switch_polarity_inverse,\n\t\t\t * DPDT_SEL_N =1, DPDT_SEL_P =0\n\t\t\t */\n\t\t\tregval = (!polarity_inverse ? 0x0 : 0x1);\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x64, 0x1, regval);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_FW:\n\t\t\t/* 0x4c[23] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/* 0x4c[24] = 1 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x1);\n\t\t\tbreak;\n\t\tcase BT_8822B_1ANT_CTRL_BY_BT:\n\t\t\t/* 0x4c[23] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4e, 0x80, 0x0);\n\t\t\t/* 0x4c[24] = 0 */\n\t\t\tbtc->btc_write_1byte_bitmask(btc, 0x4f, 0x01, 0x0);\n\n\t\t\t/* no setup required, because antenna switch control\n\t\t\t * value by BT vendor 0xac[1:0]\n\t\t\t */\n\t\t\tbreak;\n\t\t}\n\t}\n}\n\n/* set gnt_wl gnt_bt control by sw high low, or\n * hwpta while in power on, ini, wlan off, wlan only, wl2g non-currrent,\n * wl2g current, wl5g\n */\n\nstatic\nvoid halbtc8822b1ant_set_ant_path(struct btc_coexist *btc,\n\t\t\t\t u8 ant_pos_type, boolean force_exec,\n\t\t\t\t u8 phase)\n{\n\tstruct coex_sta_8822b_1ant *coex_sta = &btc->coex_sta_8822b_1ant;\n\tstruct coex_dm_8822b_1ant *coex_dm = &btc->coex_dm_8822b_1ant;\n\tu32 u32tmp1 = 0, u32tmp2 = 0;\n\tu8 u8tmp = 0, ctrl_type, pos_type;\n\tu8 wl_ctrl, wl_state;\n\tu8 bt_ctrl, bt_state;\n\n\tif (!force_exec) {\n\t\tif (coex_dm->cur_ant_pos_type == ((ant_pos_type << 8) + phase))\n\t\t\treturn;\n\t}\n\n\tcoex_dm->cur_ant_pos_type = (ant_pos_type << 8) + phase;\n\n\tif (btc->dbg_mode) {\n\t\tu32tmp1 = btc->btc_read_4byte(btc, 0xcbc);\n\t\tu32tmp2 = btc->btc_read_4byte(btc, 0xcb4);\n\t\tu8tmp = btc->btc_read_1byte(btc, 0x73);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t \"[BTCoex], (Before Ant Setup) 0xcb4 = 0x%x, 0xcbc = 0x%x, 0x73 = 0x%x\\n\",\n\t\t\t u32tmp1, u32tmp2, u8tmp);\n\t\tBTC_TRACE(trace_buf);\n\t}\n\n\tswitch (phase) {\n\tcase BT_8822B_1ANT_PHASE_POWERON:\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t \"[BTCoex], set_ant_path - 1ANT_PHASE_COEX_POWERON\\n\");\n\t\tBTC_TRACE(trace_buf);\n\n\t\t/* set Path control owner to BT at power-on step */\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_BTSIDE);\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_BT;\n\n\t\tcoex_sta->run_time_state = FALSE;\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_INIT:\n\t\t/* Ext switch buffer mux */\n\t\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t \"[BTCoex], set_ant_path - 1ANT_PHASE_COEX_INIT\\n\");\n\t\tBTC_TRACE(trace_buf);\n\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_WL_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_BT_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\t/* set GNT_BT to SW high */\n\t\thalbtc8822b1ant_set_gnt_bt(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_HIGH);\n\n\t\t/* set GNT_WL to SW low */\n\t\thalbtc8822b1ant_set_gnt_wl(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_LOW);\n\n\t\t/* set Path control owner to WL at initial step */\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_WLSIDE);\n\n\t\tcoex_sta->run_time_state = FALSE;\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_BT;\n\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_WONLY:\n\t\t/* Ext switch buffer mux */\n\t\tbtc->btc_write_1byte(btc, 0x974, 0xff);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0x1991, 0x3, 0x0);\n\t\tbtc->btc_write_1byte_bitmask(btc, 0xcbe, 0x8, 0x0);\n\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t \"[BTCoex], set_ant_path - 1ANT_PHASE_WLANONLY_INIT\\n\");\n\t\tBTC_TRACE(trace_buf);\n\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_WL_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\thallbtc8822b1ant_ltecoex_table(btc, BT_8822B_1ANT_CTT_BT_VS_LTE,\n\t\t\t\t\t 0xffff);\n\n\t\t/* set GNT_BT to SW Low */\n\t\thalbtc8822b1ant_set_gnt_bt(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_LOW);\n\n\t\t/* Set GNT_WL to SW high */\n\t\thalbtc8822b1ant_set_gnt_wl(btc, BT_8822B_1ANT_GNT_BLOCK_RFC_BB,\n\t\t\t\t\t BT_8822B_1ANT_GNT_CTRL_BY_SW,\n\t\t\t\t\t BT_8822B_1ANT_GNT_SET_TO_HIGH);\n\n\t\t/* set Path control owner to WL at initial step */\n\t\thalbtc8822b1ant_coex_ctrl_owner(btc, BT_8822B_1ANT_PCO_WLSIDE);\n\n\t\tcoex_sta->run_time_state = FALSE;\n\n\t\tif (ant_pos_type == BTC_ANT_PATH_AUTO)\n\t\t\tant_pos_type = BTC_ANT_PATH_WIFI;\n\t\tbreak;\n\tcase BT_8822B_1ANT_PHASE_WOFF:\n\t\tBTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,\n\t\t\t \"[BTCoex], set_ant_path - 1ANT_PHASE_WLAN_OFF\\n\");\n\t\tBTC_TRACE(trace_buf);\n\n\t\t/* Disable LTE Coex Function in WiFi side */\n\t\thalbtc8822b1ant_ltecoex_enable(btc, 0x0);", "metadata": { "url": "github://hal/btc/halbtc8822b1ant.c", "title": "hal/btc/halbtc8822b1ant.c", "author": "fastoe", "description": "No description found.", "docSource": "hal/btc/halbtc8822b1ant.c", "chunkSource": "github://https://github.com/fastoe/RTL8812BU?payload=c033ed9af3ac85c53fa6ef0ce64f66bca28403125c36160816c164a2fdc8c20e4ef93913ee2bed280907335383c74215bf874aa8d28148e88bde8a223bb628a1213630aedd615c49f536108d05f10d3539f429f6a9bfe0046a76524fa3dd08cc20957aa977dcc866d1d95e3f3207ca7c457d427fbabc8731e8d0a1cf7176081430a5818096019e3bfe163feb5a185c8e:da8a6f218c3287d809c436b480c1db85", "published": "1/28/2025, 7:24:59 PM", "wordCount": 13906, "tokenCount": 64907 }, "distance": 0.42097437381744385, "score": 0.000029567665478680283 } ] }
yindo added the investigating label 2026-02-22 18:27:26 -05:00
yindo closed this issue 2026-02-22 18:27:26 -05:00
yindo commented 2026-02-22 18:27:27 -05:00
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@timothycarambat commented on GitHub (Jan 30, 2025):

Do you have reranking enabled on this workspace?

Image
@timothycarambat commented on GitHub (Jan 30, 2025): Do you have reranking enabled on this workspace? <img width="750" alt="Image" src="https://github.com/user-attachments/assets/a8864e35-6022-4624-ac3a-b84d11bb62ef" />
yindo commented 2026-02-22 18:27:27 -05:00
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@timothycarambat commented on GitHub (Jan 30, 2025):

I believe that is what is going on here. When reranking is introduced into the search we do this:
https://github.com/Mintplex-Labs/anything-llm/blob/e86ad82496e36bb2c529280fac488a99a1586832/server/utils/vectorDbProviders/lance/index.js#L127

Since the rerank score should be the most relevant score since reranking does a different job than just raw search and is often better at determining relevance to a query. The issue is our default rerank model is ms-marco-MiniLM-L-6-v2 which will do very poorly on code based documents since that is not in its core training set. We would need to add a code-based model.

This is one of the reasons that reranking is not default enabled, since it is largely best at semantic text, not code or data tables.

That being said, the relationship between score and threshold are exactly as you would presume. In this particular instance reranking is just giving a very very low confidence score since it is basically not built to handle that.

The _distance value you see is really what is being filtered on even during reranking, because that model is much more generic and can handle many different types.

If you turn of reranking the scores will make sense.

@timothycarambat commented on GitHub (Jan 30, 2025): I believe that is what is going on here. When reranking is introduced into the search we do this: https://github.com/Mintplex-Labs/anything-llm/blob/e86ad82496e36bb2c529280fac488a99a1586832/server/utils/vectorDbProviders/lance/index.js#L127 Since the rerank score should be the most relevant score since reranking does a different job than just raw search and is often better at determining relevance to a query. The issue is our default rerank model is `ms-marco-MiniLM-L-6-v2` which will do very poorly on code based documents since that is not in its core training set. We would need to add a code-based model. This is one of the reasons that reranking is not default enabled, since it is largely best at semantic text, not code or data tables. That being said, the _relationship_ between score and threshold are exactly as you would presume. In this particular instance `reranking` is just giving a very very low confidence score since it is basically not built to handle that. The `_distance` value you see is really what is being filtered on even during reranking, because that model is much more generic and can handle many different types. If you turn of reranking the scores will make sense.
yindo commented 2026-02-22 18:27:27 -05:00
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@emad-qadri commented on GitHub (Jan 31, 2025):

That makes sense, @timothycarambat. Thanks!

However, since source code analysis is one of the primary use cases for RAG systems within AnythingLLM, I’d appreciate it if you could add a reranking model soon. I’ve already determined that using a different embedding model is necessary for generating high-quality code embeddings—e.g., jina-embeddings-v2-base-code performs well for this purpose.

One question: does a reranking model need to be derived from a related embedding model, or can any model trained on code be effective? I’m not an expert in this field, so take my question with a grain of salt.

@emad-qadri commented on GitHub (Jan 31, 2025): That makes sense, @timothycarambat. Thanks! However, since source code analysis is one of the primary use cases for RAG systems within AnythingLLM, I’d appreciate it if you could add a reranking model soon. I’ve already determined that using a different embedding model is necessary for generating high-quality code embeddings—e.g., jina-embeddings-v2-base-code performs well for this purpose. One question: does a reranking model need to be derived from a related embedding model, or can any model trained on code be effective? I’m not an expert in this field, so take my question with a grain of salt.
yindo commented 2026-02-22 18:27:27 -05:00
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@timothycarambat commented on GitHub (Jan 31, 2025):

One question: does a reranking model need to be derived from a related embedding model, or can any model trained on code be effective? I’m not an expert in this field, so take my question with a grain of salt.

Totally reasonable question. The easiest way to frame re-rankers is that they are totally independent from embedders, LLM, or anything else. The specifically take a prompt and a lists of texts and rerank them to be most to least relevant.

This is distinctly different from embedding which turns text into vector values that are later pushed into a vector DB. While vectorization is supposed to retain semantic meaning, its not always the best.

In your case, you could do the following:

  • Disable reranking in your Workspace
  • Swap your system embedder model from our default to Ollama or LMStudio
  • In ollama/LMStudio import a code-embedding mode like this: https://ollama.com/unclemusclez/jina-embeddings-v2-base-code. This is a code specific embedding model.
  • Use this model as your embedder in AnythingLLM.

Now, when you embed documents your code content is more semantically captured while also retaining the text documents as well. The reason a model like this is not the default is that they tend to be quite large. Our default embedder is like 50mb. That model, for example, is 300mb

@timothycarambat commented on GitHub (Jan 31, 2025): > One question: does a reranking model need to be derived from a related embedding model, or can any model trained on code be effective? I’m not an expert in this field, so take my question with a grain of salt. Totally reasonable question. The easiest way to frame re-rankers is that they are totally independent from embedders, LLM, or anything else. The _specifically_ take a prompt and a lists of texts and _rerank_ them to be most to least relevant. This is distinctly different from embedding which turns text into vector values that are later pushed into a vector DB. While vectorization is supposed to retain semantic meaning, its not always the _best_. In your case, you could do the following: - Disable reranking in your Workspace - Swap your system embedder model from our default to Ollama or LMStudio - In ollama/LMStudio import a code-embedding mode like this: https://ollama.com/unclemusclez/jina-embeddings-v2-base-code. This is a _code specific_ embedding model. - Use this model as your embedder in AnythingLLM. Now, when you embed documents your code content is more semantically captured while also retaining the text documents as well. The reason a model like this is not the default is that they tend to be quite large. Our default embedder is like 50mb. That model, for example, is 300mb
yindo changed title from [DOCS]: Perform a vector similarity search in a workspace to [GH-ISSUE #3063] [DOCS]: Perform a vector similarity search in a workspace 2026-06-05 14:43:43 -04:00
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Reference: Mintplex-Labs/anything-llm#1963
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