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arch_defaults_test: the gfx12 table has twelve switches (SMALL_UNR, GR_Q32_G, GR_Q8_PFS are off under STRATA_DEFAULTS=026)
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1 file changed
+6
-4
@@ -108,7 +108,7 @@ int main() {
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unset("STRATA_QFUSE");
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unset("STRATA_TSUM");
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}
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// gfx12: the five prompt switches and four bit-identical decode switches, no bit-changing one
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// gfx12: the five prompt switches and seven bit-identical decode switches, no bit-changing one
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unset("STRATA_GFX12_DEFAULTS");
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for (const char* a : {"gfx1200", "gfx1201", "gfx1201:sramecc-:xnack-"}) {
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const auto t = arch_default_env(a);
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@@ -249,7 +249,7 @@ int main() {
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const char* five[] = {"STRATA_HIP_WMMA", "STRATA_PF_GEMM", "STRATA_PA_FAST", "STRATA_SELECT_WMMA", "STRATA_HC_UPMIX"};
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for (const char* k : five) unset(k);
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CHECK(apply_arch_defaults("gfx1100", false).empty());
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// gfx12: a discrete RDNA4 card gets its own nine switches (five prompt, four decode); a second call has nothing to do
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// gfx12: a discrete RDNA4 card gets its own twelve switches (five prompt, seven decode); a second call has nothing to do
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const char* g12[] = {"STRATA_GDN_HEAD", "STRATA_GDN_PP", "STRATA_GDN_CONVL2", "STRATA_GDN_NOY", "STRATA_CVEC_FUSE",
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"STRATA_ATTN_LANECELL", "STRATA_ATTN_MERGE_V2", "STRATA_TSUM", "STRATA_EXPDEC"};
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for (const char* k : g12) unset(k);
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@@ -396,7 +396,7 @@ int main() {
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CHECK(prompt_attn_imma_default(false, 86, false));
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CHECK(!prompt_attn_imma_default(false, 86, true));
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CHECK(!prompt_attn_imma_default(false, 120, true));
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// the gfx12 decode switches: the arch table is v0.2.6's five prompt switches under 026, nine otherwise; gfx1151 and the others do not move
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// the gfx12 decode switches: the arch table is v0.2.6's five prompt switches under 026, twelve otherwise; gfx1151 and the others do not move
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{
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const auto t26 = strata::core::arch_default_env("gfx1201", true);
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const auto t27 = strata::core::arch_default_env("gfx1201", false);
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@@ -404,10 +404,12 @@ int main() {
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for (const auto& kv : t) if (kv.first == k) return true;
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return false;
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};
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CHECK(t26.size() == 5 && t27.size() == 9);
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CHECK(t26.size() == 5 && t27.size() == 12);
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CHECK(has(t26, "STRATA_GDN_HEAD") && has(t26, "STRATA_CVEC_FUSE"));
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CHECK(!has(t26, "STRATA_ATTN_LANECELL") && !has(t26, "STRATA_ATTN_MERGE_V2") && !has(t26, "STRATA_TSUM") && !has(t26, "STRATA_EXPDEC"));
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CHECK(has(t27, "STRATA_ATTN_LANECELL") && has(t27, "STRATA_ATTN_MERGE_V2") && has(t27, "STRATA_TSUM") && has(t27, "STRATA_EXPDEC"));
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CHECK(has(t27, "STRATA_SMALL_UNR") && has(t27, "STRATA_GR_Q32_G") && has(t27, "STRATA_GR_Q8_PFS")); // AMD-Q: bitwise load-ordering switches
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CHECK(!has(t26, "STRATA_SMALL_UNR") && !has(t26, "STRATA_GR_Q32_G") && !has(t26, "STRATA_GR_Q8_PFS"));
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CHECK(strata::core::arch_default_env("gfx1200", true).size() == 5);
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CHECK(strata::core::arch_default_env("gfx1151", true) == strata::core::arch_default_env("gfx1151", false));
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CHECK(strata::core::arch_default_env("gfx1100", true).empty() && strata::core::arch_default_env("gfx1100", false).empty());
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