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Setup: write --vram-reserve-mib 700 on a single-card Windows Strix Halo config with no other reserve (G16)
A Strix config with pictures off, or for a model with no picture reader, had no --vram-reserve-mib, and the 0.2.12 engine then applied its Windows floor of 2560 MiB, which on the shared pool only moves memory from the expert cache into the RAM budget's page-locked complement: strata launch of UD-Q4_K_XL never started (Q4-P8 step A15). Pictures on already write 700 (VISION table), and the app writes its own reserve, so this is one rule for every size: the engine's own default, written down, on a Windows gfx1151 (uma) config that has no other --vram-reserve-mib. Existing saved configs keep what they have until setup runs again; the engine commit before this one covers them after `strata update`. Snapshot: three strix_halo_win cells gain --vram-reserve-mib 700 (setup entry, config and argv): ud_q4_k_xl, ud_iq4_xs_v31, iq3_s. Every other class and set is byte-identical. tests/snapshot/test_strix_reserve.py pins all three sizes.
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@@ -20,6 +20,11 @@ from dataclasses import dataclass
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from pathlib import Path
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from typing import Any
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#: The reserve a Windows Strix Halo config gets when nothing else gives one: the engine's own default (--vram-reserve-mib 700), written down so the engine's
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#: Windows floor of 2560 MiB does not replace it (G16). The app's own reserve and the one pictures on write are 700 or more already, so this is one rule for
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#: every size on a single-card Windows Strix Halo (no size threshold: a new model of unknown size could hang the same way).
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UMA_WIN_RESERVE_MIB = 700
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@dataclass
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class SetupInputs:
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@@ -319,6 +324,13 @@ def config_for(inp: SetupInputs, lib) -> SetupConfig:
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args += ["--vram-reserve-mib", str(a.vram_reserve_mib)]
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ok(f"VRAM kept free for other programs: {a.vram_reserve_mib} MiB (--vram-reserve-mib; the expert cache takes "
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"that much less)")
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elif hip and WIN and gpu.get("uma") and gfx_arch_is(gpu.get("arch"), "gfx1151") and not multi and "--vram-reserve-mib" not in args:
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# G16 (Q4-P8, 2026-11-08): a Windows Strix Halo config with no reserve at all (pictures off, or a model with no picture reader) never started
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# UD-Q4_K_XL: with no --vram-reserve-mib the engine puts its Windows floor of 2560 MiB on any card of 15 GiB or more (made for a 20 GB discrete
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# card that paged, #1376), and on this shared pool that room is taken straight back by the RAM budget's page-locked complement, so the prompt
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# path's own buffers found 0 MiB and the engine stepped its chunk down for ever. Pictures on already write 700 (VISION above), the app writes its
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# own, and every measured Strix run carried it: the engine's own default, said out loud, so the floor does not apply.
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args += ["--vram-reserve-mib", str(UMA_WIN_RESERVE_MIB)]
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if not multi and family == "unsloth" and 0 < gpu.get("vram_gb", 0.0) <= UD_FIT_CARD_GB:
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# a card of about 8 GB: the config setup would write may not start (measured on an A750). Pick the least
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# harmful one that fits and say so; what the user chose with --context / --kv / --vram-reserve-mib is kept
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@@ -54,7 +54,9 @@
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"--kv",
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"int8",
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"--kv-resident",
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"32768"
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"32768",
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"--vram-reserve-mib",
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"700"
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],
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"cwd": "<REPO>",
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"tokenizer": "<ROOT>/data/packs/iq3_s/tokenizer",
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@@ -90,7 +92,9 @@
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"--kv",
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"int8",
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"--kv-resident",
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"32768"
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"32768",
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"--vram-reserve-mib",
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"700"
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],
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"env_set": {},
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"notes": [
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@@ -54,7 +54,9 @@
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"--kv-resident",
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"32768",
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"--resident-budget-gib",
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"56"
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"56",
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"--vram-reserve-mib",
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"700"
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],
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"cwd": "<REPO>",
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"tokenizer": "<ROOT>/data/packs/ud_iq4_xs_v31/tokenizer",
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@@ -90,7 +92,9 @@
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"--kv-resident",
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"32768",
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"--resident-budget-gib",
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"56"
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"56",
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"--vram-reserve-mib",
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"700"
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],
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"env_set": {},
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"notes": [
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@@ -54,7 +54,9 @@
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"--kv-resident",
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"32768",
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"--resident-budget-gib",
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"71"
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"71",
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"--vram-reserve-mib",
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"700"
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],
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"cwd": "<REPO>",
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"tokenizer": "<ROOT>/data/packs/ud_q4_k_xl/tokenizer",
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@@ -90,7 +92,9 @@
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"--kv-resident",
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"32768",
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"--resident-budget-gib",
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"71"
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"71",
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"--vram-reserve-mib",
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"700"
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],
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"env_set": {},
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"notes": [
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@@ -0,0 +1,39 @@
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"""G16 (Q4-P8, 2026-11-08): a Windows Strix Halo config with no picture reader (or pictures off) has no --vram-reserve-mib, and the engine then applies its
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Windows floor of 2560 MiB, which on the shared pool only moves memory from the expert cache into the RAM budget's page-locked complement: UD-Q4_K_XL never
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started (the prompt path's own buffers found 0 MiB). Setup writes the engine's own default, 700, on every single-card Windows Strix Halo config that has no other reserve; every other cell is pinned by the golden files.
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python -m pytest tests/snapshot/test_strix_reserve.py -q
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"""
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from __future__ import annotations
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import sys
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import unittest
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[2]
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if str(ROOT) not in sys.path:
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sys.path.insert(0, str(ROOT))
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from tests.snapshot.driver import drive # noqa: E402
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def reserve(record: dict):
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args = record["config_file"]["args"]
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return args[args.index("--vram-reserve-mib") + 1] if "--vram-reserve-mib" in args else None
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class StrixReserve(unittest.TestCase):
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def test_every_single_card_strix_set_without_pictures_gets_the_engines_own_700(self):
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# one rule for every size: the big expert set that hung (UD-Q4_K_XL, 77 GB) and the small ones (UD-IQ4_XS-v31 59.5 GB, IQ3_S 50.3 GB)
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for model in ("ud_q4_k_xl", "ud_iq4_xs_v31", "iq3_s"):
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with self.subTest(model=model):
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rec = drive("strix_halo_win", model, "setup")
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self.assertEqual(rec["inputs"]["vision"], "none")
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self.assertEqual(reserve(rec), "700")
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self.assertEqual(rec["config_file"]["args"].count("--vram-reserve-mib"), 1)
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self.assertIn("700", rec["engine"]["argv"])
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if __name__ == "__main__":
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unittest.main()
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