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Niko1221
aea8d64bcc
- moe_mm.metal: mm_gu3 / mm_down3 - weights decoded per lane straight into matmul2d's right-input cooperative tensor (single-simdgroup scope, no threadgroup staging or barriers in the K loop); W4<F> 4-value decoders for Q2_0, IQ3_XXS, IQ2_XXS, IQ2_XS, IQ2_S, IQ3_S, IQ4_NL (quant.metal's deq arithmetic) - qsa_prompt.metal: qsa_attn_mm (S = Q K^T and P V as single-simdgroup matmuls, int8 K/V decoded into the right input; same partials as qsa_attn, so qsa_merge is unchanged), qsa_q_f16 - tests: qsa_prompt_parity, coop_layout (the cooperative tensors' element layout), moe_mm_parity --v3; prompt_chain PC_GU / PC_DN / PC_QSA switches (defaults v3 / v3 / mm)
33 lines
1.2 KiB
C++
33 lines
1.2 KiB
C++
// metal/tests/coop_layout.cpp - which (index 0, index 1) elements of a single-simdgroup matmul2d's right input, left
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// input and destination cooperative tensors each lane holds (mm_bench.metal coop_layout).
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// coop_layout [TM_TN_TK]
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#include "mtl_rt.h"
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#include <cstdio>
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#include <string>
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int main(int argc, char** argv) {
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const std::string cfg = argc > 1 ? argv[1] : "16_32_16";
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mtl::Context cx;
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const int lib = cx.compile({"mm_bench.metal"}, "#define NO_GGML_COMMON 1\n");
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mtl::Pipeline p = cx.pipeline(lib, "coop_layout_" + cfg);
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mtl::Buffer out = cx.alloc(4 * 3 * 32 * 128 * 4);
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mtl::Dispatch d;
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d.p = &p;
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d.args = {mtl::Arg::B(out)};
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d.tg[0] = 32;
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cx.run({d});
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const int* o = out.as<int>();
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const char* nm[3] = {"right", "left", "dest"};
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for (int w = 0; w < 3; ++w) {
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std::printf("%s (tile %s):\n", nm[w], cfg.c_str());
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for (int l = 0; l < 32; ++l) {
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const int* q = o + (w * 32 + l) * 128 * 4;
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std::printf(" l%-2d cap %d:", l, q[2]);
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for (int i = 0; i < q[2] && i < 128; ++i) std::printf(" (%d,%d)", q[i * 4], q[i * 4 + 1]);
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std::printf("\n");
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}
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}
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return 0;
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}
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