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Common: Switch sqrt/rsqrt/andn instructions to auto SSE/AVX

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This commit is contained in:
TellowKrinkle
2025-06-01 22:03:38 -05:00
committed by TellowKrinkle
parent 8ad9d7d047
commit 62a5cd98da
3 changed files with 45 additions and 21 deletions
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17
common/emitter/implement/simd_arithmetic.h
View File

@@ -103,26 +103,27 @@ namespace x86Emitter
//
struct xImplSimd_rSqrt
{
const xImplSimd_DestRegSSE PS;
const xImplSimd_DestRegSSE SS;
const xImplSimd_2Arg PS;
const xImplSimd_3Arg SS;
};
//////////////////////////////////////////////////////////////////////////////////////////
// SQRT has PS/SS/SD forms, but not the PD form.
// SQRT has PS/SS/PD/SD forms
//
struct xImplSimd_Sqrt
{
const xImplSimd_DestRegSSE PS;
const xImplSimd_DestRegSSE SS;
const xImplSimd_DestRegSSE SD;
const xImplSimd_2Arg PS;
const xImplSimd_3Arg SS;
const xImplSimd_2Arg PD;
const xImplSimd_3Arg SD;
};
//////////////////////////////////////////////////////////////////////////////////////////
//
struct xImplSimd_AndNot
{
const xImplSimd_DestRegSSE PS;
const xImplSimd_DestRegSSE PD;
const xImplSimd_3Arg PS;
const xImplSimd_3Arg PD;
};
//////////////////////////////////////////////////////////////////////////////////////////

27
common/emitter/simd.cpp
View File

@@ -377,28 +377,29 @@ namespace x86Emitter
};
const xImplSimd_rSqrt xRSQRT =
{
{0x00, 0x52}, // PS
{0xf3, 0x52} // SS
{
{SIMDInstructionInfo(0x52)}, // PS
{SIMDInstructionInfo(0x52).pf3()}, // SS
};
const xImplSimd_rSqrt xRCP =
{
{0x00, 0x53}, // PS
{0xf3, 0x53} // SS
{
{SIMDInstructionInfo(0x53)}, // PS
{SIMDInstructionInfo(0x53).pf3()}, // SS
};
const xImplSimd_Sqrt xSQRT =
{
{0x00, 0x51}, // PS
{0xf3, 0x51}, // SS
{0xf2, 0x51} // SS
{
{SIMDInstructionInfo(0x51)}, // PS
{SIMDInstructionInfo(0x51).pf3()}, // SS
{SIMDInstructionInfo(0x51).p66()}, // PD
{SIMDInstructionInfo(0x51).pf2()}, // SS
};
const xImplSimd_AndNot xANDN =
{
{0x00, 0x55}, // PS
{0x66, 0x55} // PD
{
{SIMDInstructionInfo(0x55)}, // PS
{SIMDInstructionInfo(0x55).p66()}, // PD
};
const xImplSimd_PAbsolute xPABS =