mirror of
https://github.com/PCSX2/pcsx2.git
synced 2026-01-31 01:15:24 +01:00
10fc9a790d
This makes the timing of NAX advancing more similar to console since it emulates the decode buffer behaviour of it rushing ahead of playback until the buffer is full. It also makes interpolation of the first four samples more correct by using real data instead of the zero filled previous values. [SAVEVERSION+]
553 lines
18 KiB
C++
553 lines
18 KiB
C++
// SPDX-FileCopyrightText: 2002-2026 PCSX2 Dev Team
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// SPDX-License-Identifier: GPL-3.0+
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#include "SPU2/Debug.h"
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#include "SPU2/regs.h"
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#include "Config.h"
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#include "common/Console.h"
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#include "common/FileSystem.h"
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#include <cstdarg>
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#ifdef PCSX2_DEVBUILD
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static FILE* spu2Log = nullptr;
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void SPU2::OpenFileLog()
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{
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if (spu2Log)
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return;
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spu2Log = EmuFolders::OpenLogFile("SPU2Log.txt", "w");
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setvbuf(spu2Log, nullptr, _IONBF, 0);
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}
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void SPU2::CloseFileLog()
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{
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if (!spu2Log)
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return;
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std::fclose(spu2Log);
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spu2Log = nullptr;
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}
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void SPU2::FileLog(const char* fmt, ...)
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{
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if (!spu2Log)
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return;
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std::va_list ap;
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va_start(ap, fmt);
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std::vfprintf(spu2Log, fmt, ap);
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std::fflush(spu2Log);
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va_end(ap);
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}
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//Note to developer on the usage of ConLog:
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// while ConLog doesn't print anything if messages to console are disabled at the GUI,
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// it's still better to outright not call it on tight loop scenarios, by testing MsgToConsole() (which is inline and very quick).
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// Else, there's some (small) overhead in calling and returning from ConLog.
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void SPU2::ConLog(const char* fmt, ...)
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{
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if (!SPU2::MsgToConsole())
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return;
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std::va_list ap;
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va_start(ap, fmt);
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Console.FormatV(fmt, ap);
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va_end(ap);
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if (spu2Log)
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{
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va_start(ap, fmt);
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std::vfprintf(spu2Log, fmt, ap);
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std::fflush(spu2Log);
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va_end(ap);
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}
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}
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void V_VolumeSlide::DebugDump(FILE* dump, const char* title, const char* nameLR)
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{
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fprintf(dump, "%s Volume for %s Channel:\t%x\n"
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" - Value: %x\n",
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title, nameLR, Reg_VOL, Value);
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}
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void V_VolumeSlideLR::DebugDump(FILE* dump, const char* title)
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{
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Left.DebugDump(dump, title, "Left");
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Right.DebugDump(dump, title, "Right");
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}
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void V_VolumeLR::DebugDump(FILE* dump, const char* title)
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{
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fprintf(dump, "Volume for %s (%s Channel):\t%x\n", title, "Left", Left);
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fprintf(dump, "Volume for %s (%s Channel):\t%x\n", title, "Right", Right);
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}
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void SPU2::DoFullDump()
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{
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FILE* dump;
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if (SPU2::MemDump())
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{
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dump = EmuFolders::OpenLogFile("SPU2mem.dat", "wb");
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if (dump)
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{
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fwrite(_spu2mem, 0x200000, 1, dump);
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fclose(dump);
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}
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}
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if (SPU2::RegDump())
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{
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dump = EmuFolders::OpenLogFile("SPU2regs.dat", "wb");
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if (dump)
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{
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fwrite(spu2regs, 0x2000, 1, dump);
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fclose(dump);
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}
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}
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if (!SPU2::CoresDump())
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return;
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dump = EmuFolders::OpenLogFile("SPU2Cores.txt", "wt");
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if (dump)
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{
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for (u8 c = 0; c < 2; c++)
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{
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fprintf(dump, "#### CORE %d DUMP.\n", c);
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Cores[c].MasterVol.DebugDump(dump, "Master");
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Cores[c].ExtVol.DebugDump(dump, "External Data Input");
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Cores[c].InpVol.DebugDump(dump, "Voice Data Input [dry]");
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Cores[c].FxVol.DebugDump(dump, "Effects/Reverb [wet]");
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fprintf(dump, "Interrupt Address: %x\n", Cores[c].IRQA);
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fprintf(dump, "DMA Transfer Start Address: %x\n", Cores[c].TSA);
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fprintf(dump, "External Input to Direct Output (Left): %s\n", Cores[c].DryGate.ExtL ? "Yes" : "No");
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fprintf(dump, "External Input to Direct Output (Right): %s\n", Cores[c].DryGate.ExtR ? "Yes" : "No");
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fprintf(dump, "External Input to Effects (Left): %s\n", Cores[c].WetGate.ExtL ? "Yes" : "No");
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fprintf(dump, "External Input to Effects (Right): %s\n", Cores[c].WetGate.ExtR ? "Yes" : "No");
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fprintf(dump, "Sound Data Input to Direct Output (Left): %s\n", Cores[c].DryGate.SndL ? "Yes" : "No");
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fprintf(dump, "Sound Data Input to Direct Output (Right): %s\n", Cores[c].DryGate.SndR ? "Yes" : "No");
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fprintf(dump, "Sound Data Input to Effects (Left): %s\n", Cores[c].WetGate.SndL ? "Yes" : "No");
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fprintf(dump, "Sound Data Input to Effects (Right): %s\n", Cores[c].WetGate.SndR ? "Yes" : "No");
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fprintf(dump, "Voice Data Input to Direct Output (Left): %s\n", Cores[c].DryGate.InpL ? "Yes" : "No");
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fprintf(dump, "Voice Data Input to Direct Output (Right): %s\n", Cores[c].DryGate.InpR ? "Yes" : "No");
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fprintf(dump, "Voice Data Input to Effects (Left): %s\n", Cores[c].WetGate.InpL ? "Yes" : "No");
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fprintf(dump, "Voice Data Input to Effects (Right): %s\n", Cores[c].WetGate.InpR ? "Yes" : "No");
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fprintf(dump, "IRQ Enabled: %s\n", Cores[c].IRQEnable ? "Yes" : "No");
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fprintf(dump, "Effects Enabled: %s\n", Cores[c].FxEnable ? "Yes" : "No");
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fprintf(dump, "Mute Enabled: %s\n", Cores[c].Mute ? "Yes" : "No");
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fprintf(dump, "Noise Clock: %d\n", Cores[c].NoiseClk);
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fprintf(dump, "DMA Bits: %d\n", Cores[c].DMABits);
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fprintf(dump, "Effects Start: %x\n", Cores[c].EffectsStartA);
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fprintf(dump, "Effects End: %x\n", Cores[c].EffectsEndA);
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fprintf(dump, "Registers:\n");
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fprintf(dump, " - PMON: %x\n", Cores[c].Regs.PMON);
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fprintf(dump, " - NON: %x\n", Cores[c].Regs.NON);
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fprintf(dump, " - VMIXL: %x\n", Cores[c].Regs.VMIXL);
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fprintf(dump, " - VMIXR: %x\n", Cores[c].Regs.VMIXR);
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fprintf(dump, " - VMIXEL: %x\n", Cores[c].Regs.VMIXEL);
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fprintf(dump, " - VMIXER: %x\n", Cores[c].Regs.VMIXER);
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fprintf(dump, " - MMIX: %x\n", Cores[c].Regs.VMIXEL);
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fprintf(dump, " - ENDX: %x\n", Cores[c].Regs.VMIXER);
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fprintf(dump, " - STATX: %x\n", Cores[c].Regs.VMIXEL);
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fprintf(dump, " - ATTR: %x\n", Cores[c].Regs.VMIXER);
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for (u8 v = 0; v < 24; v++)
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{
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fprintf(dump, "Voice %d:\n", v);
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Cores[c].Voices[v].Volume.DebugDump(dump, "");
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fprintf(dump, " - ADSR Envelope: %x & %x\n"
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" - Ash: %x\n"
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" - Ast: %x\n"
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" - Am: %x\n"
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" - Dsh: %x\n"
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" - Sl: %x\n"
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" - Ssh: %x\n"
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" - Sst: %x\n"
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" - Sm: %x\n"
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" - Rsh: %x\n"
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" - Rm: %x\n"
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" - Phase: %x\n"
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" - Value: %x\n",
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Cores[c].Voices[v].ADSR.regADSR1,
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Cores[c].Voices[v].ADSR.regADSR2,
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Cores[c].Voices[v].ADSR.AttackShift,
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Cores[c].Voices[v].ADSR.AttackStep,
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Cores[c].Voices[v].ADSR.AttackMode,
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Cores[c].Voices[v].ADSR.DecayShift,
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Cores[c].Voices[v].ADSR.SustainLevel,
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Cores[c].Voices[v].ADSR.SustainShift,
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Cores[c].Voices[v].ADSR.SustainStep,
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Cores[c].Voices[v].ADSR.SustainMode,
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Cores[c].Voices[v].ADSR.ReleaseShift,
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Cores[c].Voices[v].ADSR.ReleaseMode,
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Cores[c].Voices[v].ADSR.Phase,
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Cores[c].Voices[v].ADSR.Value);
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fprintf(dump, " - Pitch: %x\n", Cores[c].Voices[v].Pitch);
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fprintf(dump, " - Modulated: %s\n", Cores[c].Voices[v].Modulated ? "Yes" : "No");
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fprintf(dump, " - Source: %s\n", Cores[c].Voices[v].Noise ? "Noise" : "Wave");
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fprintf(dump, " - Direct Output for Left Channel: %s\n", Cores[c].VoiceGates[v].DryL ? "Yes" : "No");
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fprintf(dump, " - Direct Output for Right Channel: %s\n", Cores[c].VoiceGates[v].DryR ? "Yes" : "No");
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fprintf(dump, " - Effects Output for Left Channel: %s\n", Cores[c].VoiceGates[v].WetL ? "Yes" : "No");
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fprintf(dump, " - Effects Output for Right Channel: %s\n", Cores[c].VoiceGates[v].WetR ? "Yes" : "No");
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fprintf(dump, " - Loop Start Address: %x\n", Cores[c].Voices[v].LoopStartA);
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fprintf(dump, " - Sound Start Address: %x\n", Cores[c].Voices[v].StartA);
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fprintf(dump, " - Next Data Address: %x\n", Cores[c].Voices[v].NextA);
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fprintf(dump, " - Play Status: %s\n", (Cores[c].Voices[v].ADSR.Phase > 0) ? "Playing" : "Not Playing");
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}
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fprintf(dump, "#### END OF DUMP.\n\n");
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}
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fclose(dump);
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}
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dump = EmuFolders::OpenLogFile("SPU2effects.txt", "wt");
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if (dump)
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{
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for (u8 c = 0; c < 2; c++)
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{
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fprintf(dump, "#### CORE %d EFFECTS PROCESSOR DUMP.\n", c);
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fprintf(dump, " - IN_COEF_L: %x\n", Cores[c].Revb.IN_COEF_R);
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fprintf(dump, " - IN_COEF_R: %x\n", Cores[c].Revb.IN_COEF_L);
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fprintf(dump, " - APF1_VOL: %x\n", Cores[c].Revb.APF1_VOL);
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fprintf(dump, " - APF2_VOL: %x\n", Cores[c].Revb.APF2_VOL);
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fprintf(dump, " - APF1_SIZE: %x\n", Cores[c].Revb.APF1_SIZE);
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fprintf(dump, " - APF2_SIZE: %x\n", Cores[c].Revb.APF2_SIZE);
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fprintf(dump, " - IIR_VOL: %x\n", Cores[c].Revb.IIR_VOL);
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fprintf(dump, " - WALL_VOL: %x\n", Cores[c].Revb.WALL_VOL);
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fprintf(dump, " - SAME_L_SRC: %x\n", Cores[c].Revb.SAME_L_SRC);
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fprintf(dump, " - SAME_R_SRC: %x\n", Cores[c].Revb.SAME_R_SRC);
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fprintf(dump, " - DIFF_L_SRC: %x\n", Cores[c].Revb.DIFF_L_SRC);
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fprintf(dump, " - DIFF_R_SRC: %x\n", Cores[c].Revb.DIFF_R_SRC);
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fprintf(dump, " - SAME_L_DST: %x\n", Cores[c].Revb.SAME_L_DST);
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fprintf(dump, " - SAME_R_DST: %x\n", Cores[c].Revb.SAME_R_DST);
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fprintf(dump, " - DIFF_L_DST: %x\n", Cores[c].Revb.DIFF_L_DST);
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fprintf(dump, " - DIFF_R_DST: %x\n", Cores[c].Revb.DIFF_R_DST);
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fprintf(dump, " - COMB1_VOL: %x\n", Cores[c].Revb.COMB1_VOL);
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fprintf(dump, " - COMB2_VOL: %x\n", Cores[c].Revb.COMB2_VOL);
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fprintf(dump, " - COMB3_VOL: %x\n", Cores[c].Revb.COMB3_VOL);
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fprintf(dump, " - COMB4_VOL: %x\n", Cores[c].Revb.COMB4_VOL);
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fprintf(dump, " - COMB1_L_SRC: %x\n", Cores[c].Revb.COMB1_L_SRC);
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fprintf(dump, " - COMB1_R_SRC: %x\n", Cores[c].Revb.COMB1_R_SRC);
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fprintf(dump, " - COMB2_L_SRC: %x\n", Cores[c].Revb.COMB2_L_SRC);
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fprintf(dump, " - COMB2_R_SRC: %x\n", Cores[c].Revb.COMB2_R_SRC);
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fprintf(dump, " - COMB3_L_SRC: %x\n", Cores[c].Revb.COMB3_L_SRC);
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fprintf(dump, " - COMB3_R_SRC: %x\n", Cores[c].Revb.COMB3_R_SRC);
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fprintf(dump, " - COMB4_L_SRC: %x\n", Cores[c].Revb.COMB4_L_SRC);
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fprintf(dump, " - COMB4_R_SRC: %x\n", Cores[c].Revb.COMB4_R_SRC);
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fprintf(dump, " - APF1_L_DST: %x\n", Cores[c].Revb.APF1_L_DST);
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fprintf(dump, " - APF1_R_DST: %x\n", Cores[c].Revb.APF1_R_DST);
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fprintf(dump, " - APF2_L_DST: %x\n", Cores[c].Revb.APF2_L_DST);
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fprintf(dump, " - APF2_R_DST: %x\n", Cores[c].Revb.APF2_R_DST);
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fprintf(dump, "#### END OF DUMP.\n\n");
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}
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fclose(dump);
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}
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}
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static const char* ParamNames[8] = {"VOLL", "VOLR", "PITCH", "ADSR1", "ADSR2", "ENVX", "VOLXL", "VOLXR"};
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static const char* AddressNames[6] = {"SSAH", "SSAL", "LSAH", "LSAL", "NAXH", "NAXL"};
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__forceinline static void _RegLog_(const char* action, int level, const char* RName, u32 mem, u32 core, u16 value)
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{
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if (level > 1)
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{
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SPU2::FileLog("[%10d] SPU2 %s mem %08x (core %d, register %s) value %04x\n",
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Cycles, action, mem, core, RName, value);
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}
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}
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#define RegLog(lev, rname, mem, core, val) _RegLog_(action, lev, rname, mem, core, val)
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void SPU2::WriteRegLog(const char* action, u32 rmem, u16 value)
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{
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//u32 vx=0, vc=0;
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u32 core = 0, omem, mem;
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omem = mem = rmem & 0x7FF; //FFFF;
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if (mem & 0x400)
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{
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omem ^= 0x400;
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core = 1;
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}
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if (omem < 0x0180) // Voice Params (VP)
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{
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const u32 voice = (omem & 0x1F0) >> 4;
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const u32 param = (omem & 0xF) >> 1;
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char dest[192];
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snprintf(dest, std::size(dest), "Voice %d %s", voice, ParamNames[param]);
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RegLog(2, dest, rmem, core, value);
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}
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else if ((omem >= 0x01C0) && (omem < 0x02E0)) // Voice Addressing Params (VA)
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{
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const u32 voice = ((omem - 0x01C0) / 12);
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const u32 address = ((omem - 0x01C0) % 12) >> 1;
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char dest[192];
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snprintf(dest, std::size(dest), "Voice %d %s", voice, AddressNames[address]);
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RegLog(2, dest, rmem, core, value);
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}
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else if ((mem >= 0x0760) && (mem < 0x07b0))
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{
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omem = mem;
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core = 0;
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if (mem >= 0x0788)
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{
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omem -= 0x28;
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core = 1;
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}
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switch (omem)
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{
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case REG_P_EVOLL:
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RegLog(2, "EVOLL", rmem, core, value);
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break;
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case REG_P_EVOLR:
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RegLog(2, "EVOLR", rmem, core, value);
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break;
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case REG_P_AVOLL:
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if (core)
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{
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RegLog(2, "AVOLL", rmem, core, value);
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}
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break;
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case REG_P_AVOLR:
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if (core)
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{
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RegLog(2, "AVOLR", rmem, core, value);
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}
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break;
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case REG_P_BVOLL:
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RegLog(2, "BVOLL", rmem, core, value);
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break;
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case REG_P_BVOLR:
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RegLog(2, "BVOLR", rmem, core, value);
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break;
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case REG_P_MVOLXL:
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RegLog(2, "MVOLXL", rmem, core, value);
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break;
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case REG_P_MVOLXR:
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RegLog(2, "MVOLXR", rmem, core, value);
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break;
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case R_IIR_VOL:
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RegLog(2, "IIR_VOL", rmem, core, value);
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break;
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case R_COMB1_VOL:
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RegLog(2, "COMB1_VOL", rmem, core, value);
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break;
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case R_COMB2_VOL:
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RegLog(2, "COMB2_VOL", rmem, core, value);
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break;
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case R_COMB3_VOL:
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RegLog(2, "COMB3_VOL", rmem, core, value);
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break;
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case R_COMB4_VOL:
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RegLog(2, "COMB4_VOL", rmem, core, value);
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break;
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case R_WALL_VOL:
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RegLog(2, "WALL_VOL", rmem, core, value);
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break;
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case R_APF1_VOL:
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RegLog(2, "APF1_VOL", rmem, core, value);
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break;
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case R_APF2_VOL:
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RegLog(2, "APF2_VOL", rmem, core, value);
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break;
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case R_IN_COEF_L:
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RegLog(2, "IN_COEF_L", rmem, core, value);
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break;
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case R_IN_COEF_R:
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RegLog(2, "IN_COEF_R", rmem, core, value);
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break;
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}
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}
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else if ((mem >= 0x07C0) && (mem < 0x07CE))
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{
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switch (mem)
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{
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case SPDIF_OUT:
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RegLog(2, "SPDIF_OUT", rmem, -1, value);
|
|
break;
|
|
case SPDIF_IRQINFO:
|
|
RegLog(2, "SPDIF_IRQINFO", rmem, -1, value);
|
|
break;
|
|
case 0x7c4:
|
|
if (Spdif.Unknown1 != value && SPU2::MsgToConsole())
|
|
SPU2::ConLog("* SPU2: SPDIF Unknown Register 1 set to %04x\n", value);
|
|
RegLog(2, "SPDIF_UNKNOWN1", rmem, -1, value);
|
|
break;
|
|
case SPDIF_MODE:
|
|
if (Spdif.Mode != value && SPU2::MsgToConsole())
|
|
SPU2::ConLog("* SPU2: SPDIF Mode set to %04x\n", value);
|
|
RegLog(2, "SPDIF_MODE", rmem, -1, value);
|
|
break;
|
|
case SPDIF_MEDIA:
|
|
if (Spdif.Media != value && SPU2::MsgToConsole())
|
|
SPU2::ConLog("* SPU2: SPDIF Media set to %04x\n", value);
|
|
RegLog(2, "SPDIF_MEDIA", rmem, -1, value);
|
|
break;
|
|
case 0x7ca:
|
|
if (Spdif.Unknown2 != value && SPU2::MsgToConsole())
|
|
SPU2::ConLog("* SPU2: SPDIF Unknown Register 2 set to %04x\n", value);
|
|
RegLog(2, "SPDIF_UNKNOWN2", rmem, -1, value);
|
|
break;
|
|
case SPDIF_PROTECT:
|
|
if (Spdif.Protection != value && SPU2::MsgToConsole())
|
|
SPU2::ConLog("* SPU2: SPDIF Copy set to %04x\n", value);
|
|
RegLog(2, "SPDIF_PROTECT", rmem, -1, value);
|
|
break;
|
|
}
|
|
UpdateSpdifMode();
|
|
}
|
|
else
|
|
{
|
|
switch (omem)
|
|
{
|
|
case REG_C_ATTR:
|
|
RegLog(4, "ATTR", rmem, core, value);
|
|
break;
|
|
case REG_S_PMON:
|
|
RegLog(1, "PMON0", rmem, core, value);
|
|
break;
|
|
case (REG_S_PMON + 2):
|
|
RegLog(1, "PMON1", rmem, core, value);
|
|
break;
|
|
case REG_S_NON:
|
|
RegLog(1, "NON0", rmem, core, value);
|
|
break;
|
|
case (REG_S_NON + 2):
|
|
RegLog(1, "NON1", rmem, core, value);
|
|
break;
|
|
case REG_S_VMIXL:
|
|
RegLog(1, "VMIXL0", rmem, core, value);
|
|
break;
|
|
case (REG_S_VMIXL + 2):
|
|
RegLog(1, "VMIXL1", rmem, core, value);
|
|
break;
|
|
case REG_S_VMIXEL:
|
|
RegLog(1, "VMIXEL0", rmem, core, value);
|
|
break;
|
|
case (REG_S_VMIXEL + 2):
|
|
RegLog(1, "VMIXEL1", rmem, core, value);
|
|
break;
|
|
case REG_S_VMIXR:
|
|
RegLog(1, "VMIXR0", rmem, core, value);
|
|
break;
|
|
case (REG_S_VMIXR + 2):
|
|
RegLog(1, "VMIXR1", rmem, core, value);
|
|
break;
|
|
case REG_S_VMIXER:
|
|
RegLog(1, "VMIXER0", rmem, core, value);
|
|
break;
|
|
case (REG_S_VMIXER + 2):
|
|
RegLog(1, "VMIXER1", rmem, core, value);
|
|
break;
|
|
case REG_P_MMIX:
|
|
RegLog(1, "MMIX", rmem, core, value);
|
|
break;
|
|
case REG_A_IRQA:
|
|
RegLog(2, "IRQAH", rmem, core, value);
|
|
break;
|
|
case (REG_A_IRQA + 2):
|
|
RegLog(2, "IRQAL", rmem, core, value);
|
|
break;
|
|
case (REG_S_KON + 2):
|
|
RegLog(1, "KON1", rmem, core, value);
|
|
break;
|
|
case REG_S_KON:
|
|
RegLog(1, "KON0", rmem, core, value);
|
|
break;
|
|
case (REG_S_KOFF + 2):
|
|
RegLog(1, "KOFF1", rmem, core, value);
|
|
break;
|
|
case REG_S_KOFF:
|
|
RegLog(1, "KOFF0", rmem, core, value);
|
|
break;
|
|
case REG_A_TSA:
|
|
RegLog(2, "TSAH", rmem, core, value);
|
|
break;
|
|
case (REG_A_TSA + 2):
|
|
RegLog(2, "TSAL", rmem, core, value);
|
|
break;
|
|
case REG_S_ENDX:
|
|
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
|
|
RegLog(2, "ENDX0", rmem, core, value);
|
|
break;
|
|
case (REG_S_ENDX + 2):
|
|
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
|
|
RegLog(2, "ENDX1", rmem, core, value);
|
|
break;
|
|
case REG_P_MVOLL:
|
|
RegLog(1, "MVOLL", rmem, core, value);
|
|
break;
|
|
case REG_P_MVOLR:
|
|
RegLog(1, "MVOLR", rmem, core, value);
|
|
break;
|
|
case REG_S_ADMAS:
|
|
RegLog(3, "ADMAS", rmem, core, value);
|
|
//ConLog("* SPU2: Core %d AutoDMAControl set to %d\n",core,value);
|
|
break;
|
|
case REG_P_STATX:
|
|
RegLog(3, "STATX", rmem, core, value);
|
|
break;
|
|
case REG_A_ESA:
|
|
RegLog(2, "ESAH", rmem, core, value);
|
|
break;
|
|
case (REG_A_ESA + 2):
|
|
RegLog(2, "ESAL", rmem, core, value);
|
|
break;
|
|
case REG_A_EEA:
|
|
RegLog(2, "EEAH", rmem, core, value);
|
|
break;
|
|
|
|
#define LOG_REVB_REG(n, t) \
|
|
case R_##n: \
|
|
RegLog(2, t "H", mem, core, value); \
|
|
break; \
|
|
case (R_##n + 2): \
|
|
RegLog(2, t "L", mem, core, value); \
|
|
break;
|
|
|
|
LOG_REVB_REG(APF1_SIZE, "APF1_SIZE")
|
|
LOG_REVB_REG(APF2_SIZE, "APF2_SIZE")
|
|
LOG_REVB_REG(SAME_L_SRC, "SAME_L_SRC")
|
|
LOG_REVB_REG(SAME_R_SRC, "SAME_R_SRC")
|
|
LOG_REVB_REG(DIFF_L_SRC, "DIFF_L_SRC")
|
|
LOG_REVB_REG(DIFF_R_SRC, "DIFF_R_SRC")
|
|
LOG_REVB_REG(SAME_L_DST, "SAME_L_DST")
|
|
LOG_REVB_REG(SAME_R_DST, "SAME_R_DST")
|
|
LOG_REVB_REG(DIFF_L_DST, "DIFF_L_DST")
|
|
LOG_REVB_REG(DIFF_R_DST, "DIFF_R_DST")
|
|
LOG_REVB_REG(COMB1_L_SRC, "COMB1_L_SRC")
|
|
LOG_REVB_REG(COMB1_R_SRC, "COMB1_R_SRC")
|
|
LOG_REVB_REG(COMB2_L_SRC, "COMB2_L_SRC")
|
|
LOG_REVB_REG(COMB2_R_SRC, "COMB2_R_SRC")
|
|
LOG_REVB_REG(COMB3_L_SRC, "COMB3_L_SRC")
|
|
LOG_REVB_REG(COMB3_R_SRC, "COMB3_R_SRC")
|
|
LOG_REVB_REG(COMB4_L_SRC, "COMB4_L_SRC")
|
|
LOG_REVB_REG(COMB4_R_SRC, "COMB4_R_SRC")
|
|
LOG_REVB_REG(APF1_L_DST, "APF1_L_DST")
|
|
LOG_REVB_REG(APF1_R_DST, "APF1_R_DST")
|
|
LOG_REVB_REG(APF2_L_DST, "APF2_L_DST")
|
|
LOG_REVB_REG(APF2_R_DST, "APF2_R_DST")
|
|
|
|
default:
|
|
RegLog(2, "UNKNOWN", rmem, core, value);
|
|
spu2Ru16(mem) = value;
|
|
}
|
|
}
|
|
}
|
|
|
|
#undef RegLog
|
|
|
|
#endif // PCSX2_DEVBUILD
|