mirror of
https://github.com/PCSX2/pcsx2.git
synced 2026-01-31 01:15:24 +01:00
ac9bf45f98
Threading VU1 took a lot of rewrites and new code to make possible (MTGS, microVU, gifUnit...), but we finally got to the point where it was feasible, and now we've done it! (so now everyone can stop complaining that pcsx2 only takes advantages of 2 cores :p). The speedups in the games that benefit from it are great if you have a cpu with 3+ cores (generally a 10~45% speedup), however games that are GS limited can be a slowdown (especially on dual core cpu's). The option can be found in the speedhacks section as "MTVU (Multi-Threaded microVU1)". And when enabled it should should show the VU thread-time percentage on the title bar window (Like we currently do for EE/GS/UI threads). It is listed as a speedhack because in order for threading VU1 to have been a speedup, we need to assume that games will not send gif packets containing Signal/Finish/Label commands from path 1 (vu1's xgkick). The good news is very-few games ever do this, so the compatibility of MTVU is very high (a game that does do this will likely hang). Note: vs2010 builds and Linux builds need to be updated to include "MTVU.h" and "MTVU.cpp". git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4865 96395faa-99c1-11dd-bbfe-3dabce05a288
237 lines
8.1 KiB
C++
237 lines
8.1 KiB
C++
/* PCSX2 - PS2 Emulator for PCs
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* Copyright (C) 2002-2010 PCSX2 Dev Team
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*
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* PCSX2 is free software: you can redistribute it and/or modify it under the terms
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* of the GNU Lesser General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with PCSX2.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "Vif.h"
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#include "Vif_Dma.h"
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#include "MTVU.h"
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enum UnpackOffset {
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OFFSET_X = 0,
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OFFSET_Y = 1,
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OFFSET_Z = 2,
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OFFSET_W = 3
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};
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static __fi u32 setVifRow(vifStruct& vif, u32 reg, u32 data) {
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vif.MaskRow._u32[reg] = data;
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return data;
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}
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// cycle derives from vif.cl
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// mode derives from vifRegs.mode
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template< uint idx, uint mode, bool doMask >
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static __ri void writeXYZW(u32 offnum, u32 &dest, u32 data) {
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int n = 0;
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vifStruct& vif = MTVU_VifX;
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if (doMask) {
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const VIFregisters& regs = MTVU_VifXRegs;
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switch (vif.cl) {
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case 0: n = (regs.mask >> (offnum * 2)) & 0x3; break;
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case 1: n = (regs.mask >> ( 8 + (offnum * 2))) & 0x3; break;
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case 2: n = (regs.mask >> (16 + (offnum * 2))) & 0x3; break;
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default: n = (regs.mask >> (24 + (offnum * 2))) & 0x3; break;
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}
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}
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// Four possible types of masking are handled below:
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// 0 - Data
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// 1 - MaskRow
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// 2 - MaskCol
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// 3 - Write protect
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switch (n) {
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case 0:
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switch (mode) {
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case 1: dest = data + vif.MaskRow._u32[offnum]; break;
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case 2: dest = setVifRow(vif, offnum, vif.MaskRow._u32[offnum] + data); break;
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default: dest = data; break;
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}
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break;
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case 1: dest = vif.MaskRow._u32[offnum]; break;
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case 2: dest = vif.MaskCol._u32[min(vif.cl,3)]; break;
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case 3: break;
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}
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}
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#define tParam idx,mode,doMask
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template < uint idx, uint mode, bool doMask, class T >
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static void __fastcall UNPACK_S(u32* dest, const T* src)
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{
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u32 data = *src;
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//S-# will always be a complete packet, no matter what. So we can skip the offset bits
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writeXYZW<tParam>(OFFSET_X, *(dest+0), data);
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writeXYZW<tParam>(OFFSET_Y, *(dest+1), data);
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writeXYZW<tParam>(OFFSET_Z, *(dest+2), data);
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writeXYZW<tParam>(OFFSET_W, *(dest+3), data);
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}
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// The PS2 console actually writes v1v0v1v0 for all V2 unpacks -- the second v1v0 pair
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// being officially "indeterminate" but some games very much depend on it.
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template < uint idx, uint mode, bool doMask, class T >
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static void __fastcall UNPACK_V2(u32* dest, const T* src)
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{
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writeXYZW<tParam>(OFFSET_X, *(dest+0), *(src+0));
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writeXYZW<tParam>(OFFSET_Y, *(dest+1), *(src+1));
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writeXYZW<tParam>(OFFSET_Z, *(dest+2), *(src+0));
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writeXYZW<tParam>(OFFSET_W, *(dest+3), *(src+1));
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}
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// V3 and V4 unpacks both use the V4 unpack logic, even though most of the OFFSET_W fields
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// during V3 unpacking end up being overwritten by the next unpack. This is confirmed real
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// hardware behavior that games such as Ape Escape 3 depend on.
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template < uint idx, uint mode, bool doMask, class T >
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static void __fastcall UNPACK_V4(u32* dest, const T* src)
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{
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writeXYZW<tParam>(OFFSET_X, *(dest+0), *(src+0));
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writeXYZW<tParam>(OFFSET_Y, *(dest+1), *(src+1));
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writeXYZW<tParam>(OFFSET_Z, *(dest+2), *(src+2));
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writeXYZW<tParam>(OFFSET_W, *(dest+3), *(src+3));
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}
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// V4_5 unpacks do not support the MODE register, and act as mode==0 always.
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template< uint idx, bool doMask >
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static void __fastcall UNPACK_V4_5(u32 *dest, const u32* src)
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{
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u32 data = *src;
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writeXYZW<idx,0,doMask>(OFFSET_X, *(dest+0), ((data & 0x001f) << 3));
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writeXYZW<idx,0,doMask>(OFFSET_Y, *(dest+1), ((data & 0x03e0) >> 2));
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writeXYZW<idx,0,doMask>(OFFSET_Z, *(dest+2), ((data & 0x7c00) >> 7));
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writeXYZW<idx,0,doMask>(OFFSET_W, *(dest+3), ((data & 0x8000) >> 8));
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}
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// =====================================================================================================
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// --------------------------------------------------------------------------------------
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// Main table for function unpacking.
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// --------------------------------------------------------------------------------------
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// The extra data bsize/dsize/etc are all duplicated between the doMask enabled and
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// disabled versions. This is probably simpler and more efficient than bothering
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// to generate separate tables.
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//
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// The double-cast function pointer nonsense is to appease GCC, which gives some rather
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// cryptic error about being unable to deduce the type parameters (I think it's a bug
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// relating to __fastcall, which I recall having some other places as well). It's fixed
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// by explicitly casting the function to itself prior to casting it to what we need it
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// to be cast as. --air
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//
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#define _upk (UNPACKFUNCTYPE)
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#define _unpk(usn, bits) (UNPACKFUNCTYPE_##usn##bits)
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#define UnpackFuncSet( vt, idx, mode, usn, doMask ) \
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(UNPACKFUNCTYPE)_unpk(u,32) UNPACK_##vt<idx, mode, doMask, u32>, \
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(UNPACKFUNCTYPE)_unpk(usn,16) UNPACK_##vt<idx, mode, doMask, usn##16>, \
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(UNPACKFUNCTYPE)_unpk(usn,8) UNPACK_##vt<idx, mode, doMask, usn##8> \
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#define UnpackV4_5set(idx, doMask) \
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(UNPACKFUNCTYPE)_unpk(u,32) UNPACK_V4_5<idx, doMask> \
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#define UnpackModeSet(idx, mode) \
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UnpackFuncSet( S, idx, mode, s, 0 ), NULL, \
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UnpackFuncSet( V2, idx, mode, s, 0 ), NULL, \
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UnpackFuncSet( V4, idx, mode, s, 0 ), NULL, \
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UnpackFuncSet( V4, idx, mode, s, 0 ), UnpackV4_5set(idx, 0), \
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\
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UnpackFuncSet( S, idx, mode, s, 1 ), NULL, \
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UnpackFuncSet( V2, idx, mode, s, 1 ), NULL, \
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UnpackFuncSet( V4, idx, mode, s, 1 ), NULL, \
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UnpackFuncSet( V4, idx, mode, s, 1 ), UnpackV4_5set(idx, 1), \
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\
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UnpackFuncSet( S, idx, mode, u, 0 ), NULL, \
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UnpackFuncSet( V2, idx, mode, u, 0 ), NULL, \
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UnpackFuncSet( V4, idx, mode, u, 0 ), NULL, \
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UnpackFuncSet( V4, idx, mode, u, 0 ), UnpackV4_5set(idx, 0), \
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\
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UnpackFuncSet( S, idx, mode, u, 1 ), NULL, \
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UnpackFuncSet( V2, idx, mode, u, 1 ), NULL, \
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UnpackFuncSet( V4, idx, mode, u, 1 ), NULL, \
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UnpackFuncSet( V4, idx, mode, u, 1 ), UnpackV4_5set(idx, 1)
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__aligned16 const UNPACKFUNCTYPE VIFfuncTable[2][3][4 * 4 * 2 * 2] =
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{
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{
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{ UnpackModeSet(0,0) },
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{ UnpackModeSet(0,1) },
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{ UnpackModeSet(0,2) }
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},
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{
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{ UnpackModeSet(1,0) },
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{ UnpackModeSet(1,1) },
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{ UnpackModeSet(1,2) }
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}
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};
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//----------------------------------------------------------------------------
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// Unpack Setup Code
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//----------------------------------------------------------------------------
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_vifT void vifUnpackSetup(const u32 *data) {
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vifStruct& vifX = GetVifX;
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if ((vifXRegs.cycle.wl == 0) && (vifXRegs.cycle.wl < vifXRegs.cycle.cl)) {
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//DevCon.WriteLn("Vif%d CL %d, WL %d Mode %x Mask %x Num %x", idx, vifXRegs.cycle.cl, vifXRegs.cycle.wl, vifXRegs.mode, vifXRegs.mask, (vifXRegs.code >> 16) & 0xff);
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vifX.cmd = 0;
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return; // Skipping write and 0 write-cycles, so do nothing!
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}
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//if (!idx) vif0FLUSH(); // Only VU0?
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vifX.usn = (vifXRegs.code >> 14) & 0x01;
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int vifNum = (vifXRegs.code >> 16) & 0xff;
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if (vifNum == 0) vifNum = 256;
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vifXRegs.num = vifNum;
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// Traditional-style way of calculating the gsize, based on VN/VL parameters.
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// Useful when VN/VL are known template params, but currently they are not so we use
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// the LUT instead (for now).
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//uint vl = vifX.cmd & 0x03;
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//uint vn = (vifX.cmd >> 2) & 0x3;
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//uint gsize = ((32 >> vl) * (vn+1)) / 8;
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const u8& gsize = nVifT[vifX.cmd & 0x0f];
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if (vifXRegs.cycle.wl <= vifXRegs.cycle.cl) {
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vifX.tag.size = ((vifNum * gsize) + 3) / 4;
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}
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else {
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int n = vifXRegs.cycle.cl * (vifNum / vifXRegs.cycle.wl) +
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_limit(vifNum % vifXRegs.cycle.wl, vifXRegs.cycle.cl);
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vifX.tag.size = ((n * gsize) + 3) >> 2;
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}
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u32 addr = vifXRegs.code;
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if (idx && ((addr>>15)&1)) addr += vif1Regs.tops;
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vifX.tag.addr = (addr<<4) & (idx ? 0x3ff0 : 0xff0);
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VIF_LOG("Unpack VIF%x, QWC %x tagsize %x", idx, vifNum, vif0.tag.size);
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vifX.cl = 0;
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vifX.tag.cmd = vifX.cmd;
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}
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template void vifUnpackSetup<0>(const u32 *data);
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template void vifUnpackSetup<1>(const u32 *data);
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