mirror of
https://github.com/PCSX2/pcsx2-sourceforge.git
synced 2026-02-04 03:11:18 +01:00
161 lines
5.3 KiB
C++
161 lines
5.3 KiB
C++
/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2008 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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// stop compiling if NORECBUILD build (only for Visual Studio)
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#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
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#include <math.h>
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#include <string.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "Common.h"
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#include "ix86/ix86.h"
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#include "Vif.h"
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#include "VUmicro.h"
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#include <assert.h>
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extern VIFregisters *_vifRegs;
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extern u32* _vifMaskRegs;
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extern u32* _vifRow, _vifCol;
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// sse2 highly optimized vif (~200 separate functions are built) zerofrog(@gmail.com)
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extern u32 g_vif1Masks[48], g_vif0Masks[48];
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extern u32 g_vif1HasMask3[4], g_vif0HasMask3[4];
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//static const u32 writearr[4] = { 0xffffffff, 0, 0, 0 };
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//static const u32 rowarr[4] = { 0, 0xffffffff, 0, 0 };
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//static const u32 colarr[4] = { 0, 0, 0xffffffff, 0 };
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//static const u32 updatearr[4] = {0xffffffff, 0xffffffff, 0xffffffff, 0 };
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// arranged in writearr, rowarr, colarr, updatearr
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static PCSX2_ALIGNED16(u32 s_maskarr[16][4]) = {
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0xffffffff, 0x00000000, 0x00000000, 0xffffffff,
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0xffff0000, 0x0000ffff, 0x00000000, 0xffffffff,
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0xffff0000, 0x00000000, 0x0000ffff, 0xffffffff,
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0xffff0000, 0x00000000, 0x00000000, 0xffff0000,
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0x0000ffff, 0xffff0000, 0x00000000, 0xffffffff,
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0x00000000, 0xffffffff, 0x00000000, 0xffffffff,
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0x00000000, 0xffff0000, 0x0000ffff, 0xffffffff,
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0x00000000, 0xffff0000, 0x00000000, 0xffff0000,
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0x0000ffff, 0x00000000, 0xffff0000, 0xffffffff,
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0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff,
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0x00000000, 0x00000000, 0xffffffff, 0xffffffff,
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0x00000000, 0x00000000, 0xffff0000, 0xffff0000,
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0x0000ffff, 0x00000000, 0x00000000, 0x0000ffff,
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0x00000000, 0x0000ffff, 0x00000000, 0x0000ffff,
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0x00000000, 0x00000000, 0x0000ffff, 0x0000ffff,
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0x00000000, 0x00000000, 0x00000000, 0x00000000
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};
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extern u8 s_maskwrite[256];
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PCSX2_ALIGNED16(u32 s_TempDecompress[4]) = {0};
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#if defined(_MSC_VER) // gcc functions can be found in iVif.S
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#include <xmmintrin.h>
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#include <emmintrin.h>
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void SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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{
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u32 i;
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u32 prev = 0;
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if( !cpucaps.hasStreamingSIMD2Extensions ) return;
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FreezeXMMRegs(1);
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for(i = 0; i < 4; ++i, mask >>= 8, oldmask >>= 8, vif1masks += 16) {
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prev |= s_maskwrite[mask&0xff];//((mask&3)==3)||((mask&0xc)==0xc)||((mask&0x30)==0x30)||((mask&0xc0)==0xc0);
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hasmask[i] = prev;
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if( (mask&0xff) != (oldmask&0xff) ) {
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__m128i r0, r1, r2, r3;
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r0 = _mm_load_si128((__m128i*)&s_maskarr[mask&15][0]);
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r2 = _mm_unpackhi_epi16(r0, r0);
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r0 = _mm_unpacklo_epi16(r0, r0);
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r1 = _mm_load_si128((__m128i*)&s_maskarr[(mask>>4)&15][0]);
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r3 = _mm_unpackhi_epi16(r1, r1);
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r1 = _mm_unpacklo_epi16(r1, r1);
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_mm_storel_pi((__m64*)&vif1masks[0], *(__m128*)&r0);
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_mm_storel_pi((__m64*)&vif1masks[2], *(__m128*)&r1);
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_mm_storeh_pi((__m64*)&vif1masks[4], *(__m128*)&r0);
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_mm_storeh_pi((__m64*)&vif1masks[6], *(__m128*)&r1);
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_mm_storel_pi((__m64*)&vif1masks[8], *(__m128*)&r2);
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_mm_storel_pi((__m64*)&vif1masks[10], *(__m128*)&r3);
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_mm_storeh_pi((__m64*)&vif1masks[12], *(__m128*)&r2);
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_mm_storeh_pi((__m64*)&vif1masks[14], *(__m128*)&r3);
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}
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}
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FreezeXMMRegs(0);
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}
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#else // gcc
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void SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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{
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u32 i;
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u32 prev = 0;
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if( !cpucaps.hasStreamingSIMD2Extensions ) return;
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FreezeXMMRegs(1);
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for(i = 0; i < 4; ++i, mask >>= 8, oldmask >>= 8, vif1masks += 16) {
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prev |= s_maskwrite[mask&0xff];//((mask&3)==3)||((mask&0xc)==0xc)||((mask&0x30)==0x30)||((mask&0xc0)==0xc0);
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hasmask[i] = prev;
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if( (mask&0xff) != (oldmask&0xff) ) {
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u8* p0 = (u8*)&s_maskarr[mask&15][0];
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u8* p1 = (u8*)&s_maskarr[(mask>>4)&15][0];
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__asm__(".intel_syntax\n"
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"movaps %%xmm0, [%0]\n"
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"movaps %%xmm1, [%1]\n"
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"movaps %%xmm2, %%xmm0\n"
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"punpcklwd %%xmm0, %%xmm0\n"
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"punpckhwd %%xmm2, %%xmm2\n"
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"movaps %%xmm3, %%xmm1\n"
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"punpcklwd %%xmm1, %%xmm1\n"
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"punpckhwd %%xmm3, %%xmm3\n"
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"movq [%2], %%xmm0\n"
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"movq [%2+8], %%xmm1\n"
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"movhps [%2+16], %%xmm0\n"
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"movhps [%2+24], %%xmm1\n"
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"movq [%2+32], %%xmm2\n"
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"movq [%2+40], %%xmm3\n"
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"movhps [%2+48], %%xmm2\n"
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"movhps [%2+56], %%xmm3\n"
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".att_syntax\n" : : "r"(p0), "r"(p1), "r"(vif1masks) );
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}
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}
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FreezeXMMRegs(0);
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}
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif // PCSX2_NORECBUILD
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