From 3104fc20da52c8f9940f3874424c951fc0c7aa60 Mon Sep 17 00:00:00 2001 From: Ziemas Date: Thu, 5 Mar 2026 09:07:57 +0100 Subject: [PATCH] IOP: Use names for interrupt registers --- pcsx2/CDVD/Ps1CD.cpp | 4 ++-- pcsx2/HwWrite.cpp | 5 +++-- pcsx2/IopCounters.cpp | 2 +- pcsx2/IopHw.h | 2 +- pcsx2/IopIrq.cpp | 2 +- pcsx2/R3000A.cpp | 8 ++++---- pcsx2/ps2/Iop/IopHwRead.cpp | 8 ++++---- pcsx2/ps2/Iop/IopHwWrite.cpp | 4 ++-- pcsx2/ps2/Iop/IopHw_Internal.h | 4 ++-- 9 files changed, 20 insertions(+), 19 deletions(-) diff --git a/pcsx2/CDVD/Ps1CD.cpp b/pcsx2/CDVD/Ps1CD.cpp index 19f8eec367..5896f1be3a 100644 --- a/pcsx2/CDVD/Ps1CD.cpp +++ b/pcsx2/CDVD/Ps1CD.cpp @@ -542,7 +542,7 @@ void cdrInterrupt() } if (cdr.Stat != NoIntr && cdr.Reg2 != 0x18) - psxHu32(0x1070) |= 0x4; + psxHu32(HW_ISTAT) |= 0x4; CDVD_LOG("Cdr Interrupt %x\n", Irq); } @@ -620,7 +620,7 @@ void cdrReadInterrupt() CDREAD_INT((cdr.Mode & 0x80) ? (cdReadTime / 2) : cdReadTime); } - psxHu32(0x1070) |= 0x4; + psxHu32(HW_ISTAT) |= 0x4; return; } diff --git a/pcsx2/HwWrite.cpp b/pcsx2/HwWrite.cpp index 8df4e7615b..897ce5a9bb 100644 --- a/pcsx2/HwWrite.cpp +++ b/pcsx2/HwWrite.cpp @@ -4,6 +4,7 @@ #include "Common.h" #include "Hardware.h" #include "Gif_Unit.h" +#include "IopHw.h" #include "IopMem.h" #include "ps2/HwInternal.h" @@ -180,8 +181,8 @@ void _hwWrite32( u32 mem, u32 value ) PSXCLK = 33868800; SPU2::Reset(true); setPs1CDVDSpeed(cdvd.Speed); - psxHu32(0x1f801450) = 0x8; - psxHu32(0x1f801078) = 1; + psxHu32(HW_ICFG) = 0x8; + psxHu32(HW_ICTRL) = 1; psxRegs.cycle = cycle; } if(!(value & 0x100)) diff --git a/pcsx2/IopCounters.cpp b/pcsx2/IopCounters.cpp index 2b9a580d42..1c55b4a9da 100644 --- a/pcsx2/IopCounters.cpp +++ b/pcsx2/IopCounters.cpp @@ -214,7 +214,7 @@ static void _rcntFireInterrupt(int i, bool isOverflow) { // IRQ fired //DevCon.Warning("Counter %d %s IRQ Fired count %x target %x psx Cycle %d", i, isOverflow ? "Overflow" : "Target", psxCounters[i].count, psxCounters[i].target, psxRegs.cycle); - psxHu32(0x1070) |= psxCounters[i].interrupt; + psxHu32(HW_ISTAT) |= psxCounters[i].interrupt; iopTestIntc(); } diff --git a/pcsx2/IopHw.h b/pcsx2/IopHw.h index f2c1de6b2c..273ac946fc 100644 --- a/pcsx2/IopHw.h +++ b/pcsx2/IopHw.h @@ -35,7 +35,7 @@ static const u32 HW_SIO_BAUD = 0x1f80104e, HW_RAM_SIZE = 0x1f801060, - HW_IREG = 0x1f801070, + HW_ISTAT = 0x1f801070, HW_IMASK = 0x1f801074, HW_ICTRL = 0x1f801078, diff --git a/pcsx2/IopIrq.cpp b/pcsx2/IopIrq.cpp index 2059d97969..4a103659a4 100644 --- a/pcsx2/IopIrq.cpp +++ b/pcsx2/IopIrq.cpp @@ -47,6 +47,6 @@ void spu2Irq() void iopIntcIrq(uint irqType) { - psxHu32(0x1070) |= 1 << irqType; + psxHu32(HW_ISTAT) |= 1 << irqType; iopTestIntc(); } diff --git a/pcsx2/R3000A.cpp b/pcsx2/R3000A.cpp index 7200605cd3..1f6a896a7a 100644 --- a/pcsx2/R3000A.cpp +++ b/pcsx2/R3000A.cpp @@ -228,11 +228,11 @@ __ri void iopEventTest() iopEventTestIsActive = false; } - if ((psxHu32(0x1078) != 0) && ((psxHu32(0x1070) & psxHu32(0x1074)) != 0)) + if ((psxHu32(HW_ICTRL) != 0) && ((psxHu32(HW_ISTAT) & psxHu32(HW_IMASK)) != 0)) { if ((psxRegs.CP0.n.Status & 0xFE01) >= 0x401) { - PSXCPU_LOG("Interrupt: %x %x", psxHu32(0x1070), psxHu32(0x1074)); + PSXCPU_LOG("Interrupt: %x %x", psxHu32(HW_ISTAT), psxHu32(HW_IMASK)); psxException(0, 0); iopEventAction = true; } @@ -241,8 +241,8 @@ __ri void iopEventTest() void iopTestIntc() { - if( psxHu32(0x1078) == 0 ) return; - if( (psxHu32(0x1070) & psxHu32(0x1074)) == 0 ) return; + if( psxHu32(HW_ICTRL) == 0 ) return; + if( (psxHu32(HW_ISTAT) & psxHu32(HW_IMASK)) == 0 ) return; if( !eeEventTestIsActive ) { diff --git a/pcsx2/ps2/Iop/IopHwRead.cpp b/pcsx2/ps2/Iop/IopHwRead.cpp index ee0bbb4b61..f53b9ce9f7 100644 --- a/pcsx2/ps2/Iop/IopHwRead.cpp +++ b/pcsx2/ps2/Iop/IopHwRead.cpp @@ -290,13 +290,13 @@ static __fi T _HwRead_16or32_Page1( u32 addr ) // case 0x05e: hard = serial_baud_read(); break; mcase(HW_ICTRL): - ret = psxHu32(0x1078); - psxHu32(0x1078) = 0; + ret = psxHu32(HW_ICTRL); + psxHu32(HW_ICTRL) = 0; break; mcase(HW_ICTRL+2): - ret = psxHu16(0x107a); - psxHu32(0x1078) = 0; // most likely should clear all 32 bits here. + ret = psxHu16(HW_ICTRL+2); + psxHu32(HW_ICTRL) = 0; // most likely should clear all 32 bits here. break; // ------------------------------------------------------------------------ diff --git a/pcsx2/ps2/Iop/IopHwWrite.cpp b/pcsx2/ps2/Iop/IopHwWrite.cpp index 54387e07da..cd11088afb 100644 --- a/pcsx2/ps2/Iop/IopHwWrite.cpp +++ b/pcsx2/ps2/Iop/IopHwWrite.cpp @@ -325,7 +325,7 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val ) // case 0x05a: serial_control_write( val ); break; // case 0x05e: serial_baud_write( val ); break; - mcase(HW_IREG): + mcase(HW_ISTAT): psxHu(addr) &= val; if (val == 0xffffffff) { psxHu32(addr) |= 1 << 2; @@ -333,7 +333,7 @@ static __fi void _HwWrite_16or32_Page1( u32 addr, T val ) } break; - mcase(HW_IREG+2): + mcase(HW_ISTAT+2): psxHu(addr) &= val; break; diff --git a/pcsx2/ps2/Iop/IopHw_Internal.h b/pcsx2/ps2/Iop/IopHw_Internal.h index af9784b5e4..81c338096a 100644 --- a/pcsx2/ps2/Iop/IopHw_Internal.h +++ b/pcsx2/ps2/Iop/IopHw_Internal.h @@ -58,8 +58,8 @@ static __ri const char* _ioplog_GetHwName( u32 addr, T val ) // ------------------------------------------------------------------------ case 0x1f801060:return "RAM_SIZE"; - case HW_IREG: return "IREG"; - case HW_IREG+2: return "IREG_hi"; + case HW_ISTAT: return "ISTAT"; + case HW_ISTAT+2: return "ISTAT_hi"; case HW_IMASK: return "IMASK"; case HW_IMASK+2:return "IMASK_hi"; case HW_ICTRL: return "ICTRL";