RPCS3/archived-llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2026-01-31 01:35:20 +01:00
Code Issues Packages Projects Releases Wiki Activity
43,614 Commits 6 Branches 7 Tags
07cb07d80e3a0d6979cedbfe45ede78f4209df42
Commit Graph

75 Commits

Author SHA1 Message Date
Evan Cheng
caa31a82fc Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin. 
llvm-svn: 60828
 2008-12-10 02:32:19 +00:00
Evan Cheng
bc91bb7658 Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. 
llvm-svn: 59696
 2008-11-20 02:25:51 +00:00
Evan Cheng
c8ecb037a2 Eliminate a compile time warning. 
llvm-svn: 59678
 2008-11-19 23:21:33 +00:00
Evan Cheng
626e85dfc2 Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. 
llvm-svn: 59314
 2008-11-14 20:09:11 +00:00
Evan Cheng
f7c1da41a1 Handle the rest of pseudo instructions. 
llvm-svn: 59275
 2008-11-13 23:36:57 +00:00
Evan Cheng
4c8297e12b Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. 
llvm-svn: 59258
 2008-11-13 19:22:28 +00:00
Evan Cheng
d67d6c4571 Missed a break statement. 
llvm-svn: 59231
 2008-11-13 07:46:59 +00:00
Evan Cheng
3c0113820b Fix pre- and post-indexed load / store encoding bugs. 
llvm-svn: 59230
 2008-11-13 07:34:59 +00:00
Evan Cheng
9cb6f40f8f Address mode immediate offset has already been divided by 4. 
llvm-svn: 59117
 2008-11-12 08:21:12 +00:00
Evan Cheng
80d0d5cfa8 Fix a VFP binary arithmetic instruction encoding bug. 
llvm-svn: 59116
 2008-11-12 08:14:21 +00:00
Evan Cheng
a4dc0e304e Fix address mode 3 immediate offset mode encoding. 
llvm-svn: 59109
 2008-11-12 07:34:37 +00:00
Evan Cheng
7fef8cfe75 Consolidate formats; fix FCMPED etc. encodings. 
llvm-svn: 59107
 2008-11-12 07:18:38 +00:00
Evan Cheng
0966883093 Fix VFP conversion instruction encodings. 
llvm-svn: 59104
 2008-11-12 06:41:41 +00:00
Evan Cheng
39d8bf295d Fix encoding of single-precision VFP registers. 
llvm-svn: 59102
 2008-11-12 02:19:38 +00:00
Evan Cheng
cc9323ac73 VFP fld / fst immediate field is multiplied by 4. 
llvm-svn: 59100
 2008-11-12 01:02:24 +00:00
Evan Cheng
8b7fefc126 Fix FMDRR encoding. 
llvm-svn: 59088
 2008-11-11 22:46:12 +00:00
Evan Cheng
95bad0db94 Handle floating point constpool_entry's. 
llvm-svn: 59087
 2008-11-11 22:19:31 +00:00
Evan Cheng
35f1477c5a Encode VFP load / store instructions. 
llvm-svn: 59084
 2008-11-11 21:48:44 +00:00
Evan Cheng
91e4ef91c5 Encode VFP conversion instructions. 
llvm-svn: 59074
 2008-11-11 19:40:26 +00:00
Evan Cheng
3c62bb7471 Encode VFP arithmetic instructions. 
llvm-svn: 59016
 2008-11-11 02:11:05 +00:00
Evan Cheng
080c1a9fac Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used. 
llvm-svn: 58949
 2008-11-10 01:08:07 +00:00
Evan Cheng
cfa57662d1 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated. 
llvm-svn: 58896
 2008-11-08 07:38:22 +00:00
Evan Cheng
f2ebaa6a64 Fix relocation for calls to external symbols. 
llvm-svn: 58893
 2008-11-08 07:22:33 +00:00
Evan Cheng
064befa37b Skip over two-address use operands. 
llvm-svn: 58883
 2008-11-08 01:44:13 +00:00
Evan Cheng
bc946b09aa Handle ARM machine constantpool entry with non-lazy ptr. 
llvm-svn: 58882
 2008-11-08 01:31:27 +00:00
Evan Cheng
bf8a1ef40f More code clean up. 
llvm-svn: 58872
 2008-11-07 22:57:53 +00:00
Evan Cheng
3e00dcfebb Get PIC jump table working. 
llvm-svn: 58869
 2008-11-07 22:30:53 +00:00
Evan Cheng
21df9f3b4f Jump table JIT support. Work in progress. 
llvm-svn: 58836
 2008-11-07 09:06:08 +00:00
Evan Cheng
88726d85eb Encode misc arithmetic instructions. 
llvm-svn: 58828
 2008-11-07 01:41:35 +00:00
Evan Cheng
3bcb71912f Encode extend instructions; more clean up. 
llvm-svn: 58818
 2008-11-06 22:15:19 +00:00
Evan Cheng
af54e4ed18 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. 
- Consolidate instruction formats.
- Other clean up.

llvm-svn: 58808
 2008-11-06 17:48:05 +00:00
Evan Cheng
aa24d19533 Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. 
llvm-svn: 58800
 2008-11-06 08:47:38 +00:00
Evan Cheng
058721d10b Fix so_imm encoding bug; add support for MOVi2pieces. 
llvm-svn: 58790
 2008-11-06 02:25:39 +00:00
Evan Cheng
ca6759021b Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. 
llvm-svn: 58789
 2008-11-06 01:21:28 +00:00
Evan Cheng
ce97712aa6 Encode pic load / store instructions; fix some encoding bugs. 
llvm-svn: 58780
 2008-11-05 23:22:34 +00:00
Evan Cheng
9970c31dcf Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. 
llvm-svn: 58764
 2008-11-05 18:35:52 +00:00
Evan Cheng
d63b7563b7 Debug output tweak. 
llvm-svn: 58708
 2008-11-04 17:58:53 +00:00
Evan Cheng
f117632c3f Handle ARM machine constantpool entries. 
llvm-svn: 58671
 2008-11-04 00:50:32 +00:00
Jim Grosbach
5262898365 Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. 
llvm-svn: 58626
 2008-11-03 18:38:31 +00:00
Evan Cheng
07f57f0e41 Use better data structure for ConstPoolId2AddrMap. 
llvm-svn: 58532
 2008-10-31 19:55:13 +00:00
Evan Cheng
31306c546f Actually make debug output understandable. 
llvm-svn: 58529
 2008-10-31 19:15:52 +00:00
Evan Cheng
afe2deb372 Encode PICADD; some code clean up. 
llvm-svn: 58526
 2008-10-31 19:10:44 +00:00
Evan Cheng
56f4944f9a I think we got non-machine specific constpool entries covered. 
llvm-svn: 58474
 2008-10-30 23:43:36 +00:00
Evan Cheng
69c2588244 Correct way to handle CONSTPOOL_ENTRY instructions. 
llvm-svn: 58409
 2008-10-29 23:55:43 +00:00
Jim Grosbach
d735f403a0 Support for constant islands in the ARM JIT. 
Since the ARM constant pool handling supercedes the standard LLVM constant
pool entirely, the JIT emitter does not allocate space for the constants,
nor initialize the memory. The constant pool is considered part of the 
instruction stream.

Likewise, when resolving relocations into the constant pool, a hook into
the target back end is used to resolve from the constant ID# to the
address where the constant is stored.

For now, the support in the ARM emitter is limited to 32-bit integer. Future
patches will expand this to the full range of constants necessary.

llvm-svn: 58338
 2008-10-28 18:25:49 +00:00
Jim Grosbach
d44d20be6e Encode the conditional execution predicate when JITing. 
llvm-svn: 57258
 2008-10-07 19:05:35 +00:00
Jim Grosbach
61f8207ac9 Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly 
llvm-svn: 57252
 2008-10-07 17:42:09 +00:00
Jim Grosbach
d9ff019d3e Indexing off by one resulted in errant encoding of source register for 
reg->reg moves.

llvm-svn: 57011
 2008-10-03 15:53:56 +00:00
Jim Grosbach
e398f553b2 NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub 
for global relocations that do need them (libc calls, for example).

llvm-svn: 57010
 2008-10-03 15:52:42 +00:00
Dan Gohman
30c5ce1b7d Switch the MachineOperand accessors back to the short names like 
isReg, etc., from isRegister, etc.

llvm-svn: 57006
 2008-10-03 15:45:36 +00:00