Commit Graph

4642 Commits

Author SHA1 Message Date
Sanjay Patel
ba73ec481e fixed typo in comment
llvm-svn: 212279
2014-07-03 16:17:20 +00:00
Matt Arsenault
4dc8768d57 Fix missing const
llvm-svn: 212168
2014-07-02 06:45:26 +00:00
Juergen Ributzka
ce04dda8eb [FastISel] Factor out stackmap intrinsic selection code into a dedicated helper method. NFCI.
llvm-svn: 212140
2014-07-01 22:25:49 +00:00
Alp Toker
62b822cb61 Move remaining LLVM_ENABLE_DUMP conditionals out of the headers
This macro is sometimes defined manually but isn't (and doesn't need to be) in
llvm-config.h so shouldn't appear in the headers, likewise NDEBUG.

Instead switch them over to LLVM_DUMP_METHOD on the definitions.

llvm-svn: 212130
2014-07-01 21:19:13 +00:00
Quentin Colombet
f8c6acefcd [PeepholeOptimizer] Advanced rewriting of copies to avoid cross register banks
copies.

This patch extends the peephole optimization introduced in r190713 to produce
register-coalescer friendly copies when possible.

This extension taught the existing cross-bank copy optimization how to deal
with the instructions that generate cross-bank copies, i.e., insert_subreg,
extract_subreg, reg_sequence, and subreg_to_reg.
E.g.
b = insert_subreg e, A, sub0 <-- cross-bank copy
...
C = copy b.sub0 <-- cross-bank copy

Would produce the following code:
b = insert_subreg e, A, sub0 <-- cross-bank copy
...
C = copy A <-- same-bank copy

This patch also introduces a new helper class for that: ValueTracker.
This class implements the logic to look through the copy related instructions
and get the related source.

For now, the advanced rewriting is disabled by default as we are lacking the
semantic on target specific instructions to catch the motivating examples.

Related to <rdar://problem/12702965>.

llvm-svn: 212100
2014-07-01 14:33:36 +00:00
Craig Topper
4c15d35f50 Add ops() method to SDNode that returns an ArrayRef<SDUse>. Use it to simplify some code.
llvm-svn: 211993
2014-06-29 00:40:57 +00:00
Juergen Ributzka
4e8c3d809f [StackMaps] Enable patchpoint liveness analysis per default.
llvm-svn: 211817
2014-06-26 23:39:52 +00:00
Juergen Ributzka
f24160ef4c [Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpoint intrinsic and
that is also the intended usage model.

Related to <rdar://problem/17473725>

llvm-svn: 211816
2014-06-26 23:39:44 +00:00
NAKAMURA Takumi
c5a2c81f7e Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore SEH pseudo ops in X86 JIT emitter.
--
This patch enables LLVM to emit Win64-native unwind info rather than
DWARF CFI.  It handles all corner cases (I hope), including stack
realignment.

Because the unwind info is not flexible enough to describe stack frames
with a gap of unknown size in the middle, such as the one caused by
stack realignment, I modified register spilling code to place all spills
into the fixed frame slots, so that they can be accessed relative to the
frame pointer.

Patch by Vadim Chugunov!

Reviewed By: rnk

Differential Revision: http://reviews.llvm.org/D4081

llvm-svn: 211691
2014-06-25 12:41:52 +00:00
NAKAMURA Takumi
eca89a0522 Revert r211399, "Generate native unwind info on Win64"
It broke Legacy JIT Tests on x86_64-{mingw32|msvc}, aka Windows x64.

llvm-svn: 211480
2014-06-22 22:00:56 +00:00
Reid Kleckner
40d9c6f936 Generate native unwind info on Win64
This patch enables LLVM to emit Win64-native unwind info rather than
DWARF CFI.  It handles all corner cases (I hope), including stack
realignment.

Because the unwind info is not flexible enough to describe stack frames
with a gap of unknown size in the middle, such as the one caused by
stack realignment, I modified register spilling code to place all spills
into the fixed frame slots, so that they can be accessed relative to the
frame pointer.

Patch by Vadim Chugunov!

Reviewed By: rnk

Differential Revision: http://reviews.llvm.org/D4081

llvm-svn: 211399
2014-06-20 20:35:47 +00:00
Jiangning Liu
c7a7a14ca1 Move GlobalMerge from Transform to CodeGen.
This patch is to move GlobalMerge pass from Transform/Scalar                                                           
to CodeGen, because GlobalMerge depends on TargetMachine.
In the mean time, the macro INITIALIZE_TM_PASS is also moved
to CodeGen/Passes.h. With this fix we can avoid making
libScalarOpts depend on libCodeGen.

llvm-svn: 210951
2014-06-13 22:57:59 +00:00
Tim Northover
b9ec29d7c5 IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.

As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.

At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.

By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.

Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.

Summary for out of tree users:
------------------------------

+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.

llvm-svn: 210903
2014-06-13 14:24:07 +00:00
Juergen Ributzka
9dda2c5782 [FastISel][X86] Add MachineMemOperand to load/store instructions.
This commit adds MachineMemOperands to load and store instructions. This allows
the peephole optimizer to fold load instructions. Unfortunatelly the peephole
optimizer currently doesn't run at -O0.

llvm-svn: 210858
2014-06-12 23:27:57 +00:00
Juergen Ributzka
3c469924f6 [FastISel] Add support for the stackmap intrinsic.
This implements target-independent FastISel lowering for the stackmap intrinsic.

llvm-svn: 210742
2014-06-12 03:29:26 +00:00
Saleem Abdulrasool
9563db9981 CodeGen: refactor DwarfException
DwarfException served as a base class for exception handling directive emission.
However, this is also used by other exception models (e.g. Win64EH).  Rename
this class to EHStreamer and split it out of DwarfException.h.  NFC.

Use the opportunity to fix up some of the documentation comments to match
current LLVM style.  Also rename some functions to conform better with current
LLVM coding style.

llvm-svn: 210622
2014-06-11 01:19:03 +00:00
Juergen Ributzka
cc0b7b7884 [FastISel][X86] Extend support for {s|u}{add|sub|mul}.with.overflow intrinsics.
llvm-svn: 210610
2014-06-10 23:52:44 +00:00
Eric Christopher
47d13b572b Have isInTailCallPosition take the DAG so that we can use the
version of TargetLowering/Machine from there on the way to avoiding
TargetMachine in TargetLowering.

llvm-svn: 210579
2014-06-10 20:39:38 +00:00
Eric Christopher
56f9d2e5d3 Fix typos.
llvm-svn: 210571
2014-06-10 20:07:29 +00:00
Andrea Di Biagio
a2490b5eaa [DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact flags to SelectionDAG.
This patch modifies SelectionDAGBuilder to construct SDNodes with associated
NoSignedWrap, NoUnsignedWrap and Exact flags coming from IR BinaryOperator
instructions.

Added a new SDNode type called 'BinaryWithFlagsSDNode' to allow accessing
nsw/nuw/exact flags during codegen.

Patch by Marcello Maggioni.

llvm-svn: 210467
2014-06-09 12:32:53 +00:00
NAKAMURA Takumi
edd8cee5a2 Escape "@function" with \verbatim. [-Wdocumentation]
llvm-svn: 210443
2014-06-08 23:25:02 +00:00
Andrew Trick
bdb0601a15 Fix the MachineScheduler's logic for updating ready times for in-order.
Now the scheduler updates a node's ready time as soon as it is
scheduled, before releasing dependent nodes. There was a reason I
didn't do this initially but it no longer applies.

A53 is in-order and was running into an issue where nodes where added
to the readyQ too early. That's now fixed.

This also makes it easier for custom scheduling strategies to build
heuristics based on the actual cycles that the node was scheduled at.

The only impact on OOO (sandybridge/cyclone) is that ready times will
be slightly more accurate. I didn't measure any significant regressions.

llvm-svn: 210390
2014-06-07 01:48:43 +00:00
Rafael Espindola
34f7950ebf Fix a few issues with comdat handling on COFF.
* Section association cannot use just the section name as many
sections can have the same name. With this patch, the comdat symbol in
an assoc section is interpreted to mean a symbol in the associated
section and the mapping is discovered from it.

* Comdat symbols were not being set correctly. Instead we were getting
whatever was output first for that section.

A consequence is that associative sections now must use .section to
set the association. Using .linkonce would not work since it is not
possible to change a sections comdat symbol (it is used to decide if
we should create a new section or reuse an existing one).

This includes r210298, which was reverted because it was asserting
on an associated section having the same comdat as the associated
section.

llvm-svn: 210367
2014-06-06 19:26:12 +00:00
Tom Roeder
740d86dc79 Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.
It includes a pass that rewrites all indirect calls to jumptable functions to pass through these tables.

This also adds backend support for generating the jump-instruction tables on ARM and X86.
Note that since the jumptable attribute creates a second function pointer for a
function, any function marked with jumptable must also be marked with unnamed_addr.

llvm-svn: 210280
2014-06-05 19:29:43 +00:00
David Blaikie
06ac426ec0 DebugInfo: Reapply r209984 (reverted in r210143), asserting that abstract DbgVariables have DIEs.
Abstract variables within abstract scopes that are entirely optimized
away in their first inlining are omitted because their scope is not
present so the variable is never created. Instead, we should ensure the
scope is created so the variable can be added, even if it's been
optimized away in its first inlining.

This fixes the incorrect debug info in missing-abstract-variable.ll
(added in r210143) and passes an asserts self-hosting build, so
hopefully there's not more of these issues left behind... *fingers
crossed*.

llvm-svn: 210221
2014-06-04 23:50:52 +00:00
Andrew Trick
ba65eed5cb Move GenericScheduler and PostGenericScheduler into a header.
These were not exposed previously because I didn't want out-of-tree
targets to be too dependent on their internals. They can be reused for
a very wide variety of processors with casual scheduling needs without
exposing the classes by instead using hooks defined in
MachineSchedPolicy (we can add more if needed). When targets are more
aggressively tuned or want to provide custom heuristics, they can
define their own MachineSchedStrategy. I tend to think this is better
once you start customizing heuristics because you can copy over only
what you need. I don't think that layering heuristics generally works
well.

However, Arch64 targets now want to reuse the Generic scheduling logic
but also provide extensions. I don't see much harm in exposing the
Generic scheduling classes with a major caveat: these scheduling
strategies may change in the future without validating performance on
less mainstream processors. If you want to be immune from changes,
just define your own MachineSchedStrategy.

llvm-svn: 210166
2014-06-04 07:06:18 +00:00
Pete Cooper
4164797aa0 Calculate dead instructions when a live interval is created.
This gets us closer to being able to remove LiveVariables entirely which is where dead instructions are currently tagged as such.

Reviewed by Jakob Olesen

llvm-svn: 210132
2014-06-03 22:42:10 +00:00
Adam Nemet
807861a7b6 [SelectionDAG] Force cycle detection in AssignTopologicalOrder before aborting
DAG cycle detection is only enabled with ENABLE_EXPENSIVE_CHECKS.  However we
can run it just before we would crash in order to provide more informative
diagnostics.

Now in addition to the "Overran sorted position" message we also get the Node
printed if a cycle was detected.

Tested by building several configs: Debug+Assert, Debug+Assert+Check (this is
ENABLE_EXPENSIVE_CHECKS), Release+Assert and Release.  Also tried that the
AssignTopologicalOrder assert produces the expected results.

llvm-svn: 209977
2014-05-31 16:23:20 +00:00
Adam Nemet
267d4048ff [SelectionDAG] Pass DAG to checkForCycles
Pass the DAG down to checkForCycles from all callers where we have it.  This
allows target-specific nodes to be printed properly.

Also print some missing newlines.

llvm-svn: 209976
2014-05-31 16:23:17 +00:00
Adam Nemet
154449972f [SelectionDAG] Remove duplicate declaration
Prefer the decl in SelectionDAGNodes.h because it's used there and
SelectionDAG.h includes SelectionDAGNodes.h.

llvm-svn: 209975
2014-05-31 16:23:13 +00:00
Chandler Carruth
b94f570d99 Add a trivial ArrayRef helper overload to the SelectionDAG interface.
I'm using this pretty frequently in a patch I'm working on and it seems
generally useful.

llvm-svn: 209872
2014-05-30 03:50:06 +00:00
Benjamin Kramer
bbbf511429 CodeGen: Make MachineBasicBlock::back skip to the beginning of the last bundle.
This makes front/back symmetric with begin/end, avoiding some confusion.
Added instr_front/instr_back for the old behavior, corresponding to
instr_begin/instr_end. Audited all three in-tree users of back(), all
of them look like they don't want to look inside bundles.

Fixes an assertion (PR19815) when generating debug info on mips, where a
delay slot was bundled at the end of a branch.

llvm-svn: 209580
2014-05-24 13:13:17 +00:00
Eric Christopher
1742cc0aaf Remove getTargetLowering from TargetPassConfig as the target lowering
can change depending upon subtarget/subtarget features for a function.

llvm-svn: 209329
2014-05-21 22:42:07 +00:00
Eric Christopher
974cef18f4 Move the function and data section flags into the options struct and
make the functions to set them non-static.
Move and rename the llvm specific backend options to avoid conflicting
with the clang option.

Paired with a backend commit to update.

llvm-svn: 209238
2014-05-20 21:25:34 +00:00
Eric Christopher
262770bdee Clean up language and grammar.
Based on a patch by jfcaron3@gmail.com!
PR19806

llvm-svn: 209216
2014-05-20 17:11:11 +00:00
Pete Cooper
fa13048706 Use a sized enum for MachineOperandType. No functionality change
llvm-svn: 209048
2014-05-16 23:28:17 +00:00
Reid Kleckner
fd1a7dfe04 Add comdat key field to llvm.global_ctors and llvm.global_dtors
This allows us to put dynamic initializers for weak data into the same
comdat group as the data being initialized.  This is necessary for MSVC
ABI compatibility.  Once we have comdats for guard variables, we can use
the combination to help GlobalOpt fire more often for weak data with
guarded initialization on other platforms.

Reviewers: nlewycky

Differential Revision: http://reviews.llvm.org/D3499

llvm-svn: 209015
2014-05-16 20:39:27 +00:00
Eric Christopher
ac8b0b7c03 Unify command line handling of MCTargetOptions and remove extra
options and code. No functional change.

llvm-svn: 208833
2014-05-15 01:10:50 +00:00
Jay Foad
e0eac700cb Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
inappropriate since it lost its Mask parameter in r154011.

llvm-svn: 208811
2014-05-14 21:14:37 +00:00
Jay Foad
df682f6c8b Update the comments for ComputeMaskedBits, which lost its Mask parameter
in r154011.

llvm-svn: 208757
2014-05-14 08:00:07 +00:00
David Blaikie
fac608f99b Recommit r208506: DebugInfo: Include lexical scopes in inlined subroutines.
This was reverted in r208642 due to regressions surrounding file changes
within lexical scopes causing inlining information to be lost.

The issue was in LexicalScopes::getOrCreateInlinedScope, where I was
previously testing "isLexicalBlock" which is false for
"DILexicalBlockFile" (a scope used to represent changes in the current
file name) and assuming it was then a function (breaking out of the
inlined scope path and reaching for the parent non-inlined scopes). By
inverting the condition and testing for "isSubprogram" the correct
behavior is attained.

(also found some weirdness in Clang, see r208742 when reducing this test
case - the resulting test case doesn't apply with the Clang fix, but
I've added a more realistic test case to inline-scopes.ll which does
reproduce the issue and demonstrate the fix)

llvm-svn: 208748
2014-05-14 01:08:28 +00:00
Rafael Espindola
e6465aeb2d Split GlobalValue into GlobalValue and GlobalObject.
This allows code to statically accept a Function or a GlobalVariable, but
not an alias. This is already a cleanup by itself IMHO, but the main
reason for it is that it gives a lot more confidence that the refactoring to fix
the design of GlobalAlias is correct. That will be a followup patch.

llvm-svn: 208716
2014-05-13 18:45:48 +00:00
David Blaikie
1203463603 Revert "DebugInfo: Include lexical scopes in inlined subroutines."
This reverts commit r208506.

Some inlined subroutine scopes appear to be missing with this change.
Reverting while I investigate.

llvm-svn: 208642
2014-05-12 23:53:03 +00:00
Pete Cooper
801ae0ce03 Use a logical not when inverting SetCC. This unfortunately doesn't fire on any targets so I couldn't find a test case to trigger it.
The problem occurs when a non-i1 setcc is inverted.  For example 'i8 = setcc' will get 'xor 0xff' to invert this.   This is clearly wrong when the boolean contents are ZeroOrOne.

This patch introduces getLogicalNOT and updates SetCC legalisation to use it.

Reviewed by Hal Finkel.

llvm-svn: 208641
2014-05-12 23:26:58 +00:00
David Blaikie
a56eed1551 DebugInfo: Include lexical scopes in inlined subroutines.
llvm-svn: 208506
2014-05-11 18:12:17 +00:00
Oliver Stannard
2b1166b162 ARM: HFAs must be passed in consecutive registers
When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must
be passed in a block of consecutive floating-point registers, or on the stack.
This means that unused floating-point registers cannot be back-filled with
part of an HFA, however this can currently happen. This patch, along with the
corresponding clang patch (http://reviews.llvm.org/D3083) prevents this.

llvm-svn: 208413
2014-05-09 14:01:47 +00:00
Rafael Espindola
b275d7236c Don't indent inside a namespace. Don't duplicate a function name in comment.
llvm-svn: 208389
2014-05-09 02:56:16 +00:00
David Blaikie
f61e94a80f Reapply r207876 (Try simplifying LexicalScopes ownership again) including a workaround for an MSVC2012 bug regarding forward_as_tuple
(r207876 was reverted in r208131 after seeing some consistent buildbot
failure for MSVC 2012. The original commits were in r207724-r207726)

Takumi was nice enough to dig into this and locate this Microsoft
Connect issue:
http://connect.microsoft.com/VisualStudio/feedback/details/814899/forward-as-tuple-debug-implementation-error
describing a bug in MSVC2012's forward_as_tuple implementation.

Since the parameters in this instance are trivial/small, pass them by
value (using make_tuple) instead of perfectly-forwarded tuple of rvalue
references (involving the broken forward_as_tuple). Hopefully this will
satisfy MSVC2012.

llvm-svn: 208364
2014-05-08 22:24:51 +00:00
Matt Arsenault
903ece3700 Fix using wrong result type for setcc.
When reducing the bitwidth of a comparison against a constant, the
original setcc's result type was used, which was incorrect.

No test since I don't think any other in tree targets change the
bitwidth of the setcc type depending on the bitwidth of the compared
type.

llvm-svn: 208236
2014-05-07 18:26:58 +00:00
David Blaikie
7acf842266 Revert "Try simplifying LexicalScopes ownership again."
Speculatively reverting due to a suspicious failure on a Windows
buildbot.

This reverts commit 10c37a012ea11596d44cd9059fe09c959caf30c8.

llvm-svn: 208131
2014-05-06 21:07:17 +00:00