RPCS3/archived-llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2026-01-31 01:35:20 +01:00
Code Issues Packages Projects Releases Wiki Activity
175,950 Commits 6 Branches 7 Tags
1edbe64ce4653eeae2c9a3733f08a94de8947dff
Commit Graph

138 Commits

Author SHA1 Message Date
Matt Arsenault
daf210c34f GlobalISel: Implement fewerElementsVector for phi 
llvm-svn: 355048
 2019-02-28 00:16:32 +00:00
Matt Arsenault
e6b217e4a7 GlobalISel: Implement moreElementsVector for phi 
llvm-svn: 355047
 2019-02-28 00:01:05 +00:00
Matt Arsenault
94693704b3 AMDGPU/GlobalISel: Fix bit ops for non-power-of-2 sizes 
llvm-svn: 354825
 2019-02-25 21:32:48 +00:00
Matt Arsenault
dbee1c2532 AMDGPU/GlobalISel: Clamp max implicit_def elements 
llvm-svn: 354818
 2019-02-25 20:46:06 +00:00
Matt Arsenault
7c8b91e16a AMDGPU/GlobalISel: Make phis legal 
llvm-svn: 354592
 2019-02-21 15:48:13 +00:00
Matt Arsenault
0b4495aa88 AMDGPU/GlobalISel: Fix bit count ops for non-power-of-2 types 
llvm-svn: 354587
 2019-02-21 15:22:20 +00:00
Matt Arsenault
d3fbea988f GlobalISel: Fix fewerElementsVector for ctlz with different result type 
Also complete the set of related operations.

llvm-svn: 354480
 2019-02-20 16:42:52 +00:00
Matt Arsenault
59ded7428b GlobalISel: Implement moreElementsVector for g_insert results 
llvm-svn: 354477
 2019-02-20 16:11:22 +00:00
Matt Arsenault
0636313e2d GlobalISel: Implement moreElementsVector for select 
llvm-svn: 354354
 2019-02-19 17:03:09 +00:00
Matt Arsenault
2816a15cb8 GlobalISel: Implement moreElementsVector for G_EXTRACT source 
llvm-svn: 354348
 2019-02-19 16:44:22 +00:00
Matt Arsenault
72662e2e3c GlobalISel: Implement moreElementsVector for bit ops 
llvm-svn: 354345
 2019-02-19 16:30:19 +00:00
Matt Arsenault
1fe8fd01a5 GlobalISel: Implement widenScalar for g_extract scalar results 
llvm-svn: 354293
 2019-02-18 22:39:27 +00:00
Matt Arsenault
3ca7deb4b1 GlobalISel: Add alignment to LegalityQuery MMOs 
This allows targets to specify the minimum alignment required for the
load/store.

llvm-svn: 354071
 2019-02-14 22:41:09 +00:00
Matt Arsenault
7934cfbd89 AMDGPU/GlobalISel: Fix RegBankSelect for GEP. 
This is basically a pointer typed add, so shouldn't be any different.
This was assuming everything was an SGPR, which is not true.

Also cleanup legality for GEP. I don't seem to be seeing the problem
the hack marking s64 as a legal pointer type the comment mentions.

llvm-svn: 354067
 2019-02-14 22:24:28 +00:00
Matt Arsenault
5eb8676f31 AMDGPU/GlobalISel: Only make f16 constants legal on f16 targets 
We could deal with it, but there's no real point.

llvm-svn: 353845
 2019-02-12 14:54:55 +00:00
Matt Arsenault
27f957a8a8 GlobalISel: Implement moreElementsVector for implicit_def 
llvm-svn: 353754
 2019-02-11 22:00:39 +00:00
Matt Arsenault
84e44687ee GlobalISel: Add G_FCANONICALIZE instruction 
llvm-svn: 353719
 2019-02-11 17:05:20 +00:00
Matt Arsenault
75b6905f36 AMDGPU/GlobalISel: Fix shift legalization for non-power-of-2 
clampScalar doesn't do anything for non-power-of-2 in range.
There should probably be a combination rule to reduce the number
of matching rules.

llvm-svn: 353526
 2019-02-08 15:06:24 +00:00
Matt Arsenault
e16bc10b18 AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def 
llvm-svn: 353522
 2019-02-08 14:46:27 +00:00
Matt Arsenault
3ec5bce91b AMDGPU/GlobalISel: Don't use a copy in addrspacecast lowering 
llvm-svn: 353516
 2019-02-08 14:16:11 +00:00
Matt Arsenault
852ef015d3 AMDGPU/GlobalISel: Legalize addrspacecast 
Use a placeholder constant for now on targets
that need the load from the queue ptr.

llvm-svn: 353497
 2019-02-08 02:40:47 +00:00
Matt Arsenault
e739762e43 GlobalISel: Implement narrowScalar for shift main type 
This is pretty much directly ported from SelectionDAG. Doesn't include
the shift by non-constant but known bits version, since there isn't a
globalisel version of computeKnownBits yet.

This shows a disadvantage of targets not specifically which type
should be used for the shift amount. If type 0 is legalized before
type 1, the operations on the shift amount type use the wider type
(which are also less likely to legalize). This can be avoided by
targets specifying legalization actions on type 1 earlier than for
type 0.

llvm-svn: 353455
 2019-02-07 19:37:44 +00:00
Matt Arsenault
3f79f1900f AMDGPU/GlobalISel: Restrict g_implicit_def legality 
llvm-svn: 353452
 2019-02-07 19:10:15 +00:00
Matt Arsenault
a1f6f45ed6 AMDGPU/GlobalISel: Legalize fsqrt 
llvm-svn: 353438
 2019-02-07 18:14:39 +00:00
Matt Arsenault
7b9b227552 AMDGPU/GlobalISel: Legalize some f16 operations 
llvm-svn: 353436
 2019-02-07 18:03:11 +00:00
Matt Arsenault
9ee013cd69 GlobalISel: Implement fewerElementsVector for shifts 
Introduce a new function which handles instructions with multiple type
indices, but have the same number of vector elements.

Also legalize v2s16 shifts when applicable.

llvm-svn: 353432
 2019-02-07 17:38:00 +00:00
Matt Arsenault
c48f0dc588 GlobalISel: Try to make legalize rules more useful for vectors 
Mostly keep the existing functions on scalars, but add versions which
also operate based on the vector element size.

llvm-svn: 353430
 2019-02-07 17:25:51 +00:00
Matt Arsenault
f2659e02d9 AMDGPU/GlobalISel: Legalize select for v4s16 
Also add some more select tests to help show future legalization
changes.

llvm-svn: 353045
 2019-02-04 14:04:52 +00:00
Fangrui Song
9b76ec32a6 [AMDGPU] Fix -Wunused-variable after rL352978 
llvm-svn: 352982
 2019-02-03 03:51:52 +00:00
Matt Arsenault
eb50f27657 GlobalISel: Implement widenScalar for G_UNMERGE_VALUES 
For the scalar case only.

Also move the similar G_MERGE_VALUES handling to a separate function
and cleanup to make them look more similar.

llvm-svn: 352979
 2019-02-03 00:07:33 +00:00
Matt Arsenault
8ce8c26480 GlobalISel: Implement widenScalar for G_EXTRACT vector sources 
Handle the basic element extract case.

llvm-svn: 352978
 2019-02-02 23:56:00 +00:00
Matt Arsenault
827dc2a1cf AMDGPU/GlobalISel: Avoid reporting illegal extloads as legal 
This avoids breaking a test in a future commit.

llvm-svn: 352977
 2019-02-02 23:39:13 +00:00
Matt Arsenault
728a67200b AMDGPU/GlobalISel: Legalize icmp for pointer types 
llvm-svn: 352976
 2019-02-02 23:35:15 +00:00
Matt Arsenault
e0f071d018 AMDGPU/GlobalISel: Legalize constant for pointer types 
llvm-svn: 352975
 2019-02-02 23:33:49 +00:00
Matt Arsenault
ee43afbe0d AMDGPU/GlobalISel: Legalize select for pointer types 
llvm-svn: 352974
 2019-02-02 23:31:50 +00:00
Matt Arsenault
8cef0be33e GlobalISel: Legalization for inttoptr/ptrtoint 
llvm-svn: 352973
 2019-02-02 23:29:55 +00:00
Matt Arsenault
d57348e6c2 GlobalISel: Handle odd splits in fewerElementsVector for load/store 
llvm-svn: 352720
 2019-01-31 02:46:05 +00:00
Matt Arsenault
1f33c5710d GlobalISel: Implement narrowScalar for bswap 
llvm-svn: 352719
 2019-01-31 02:34:03 +00:00
Matt Arsenault
51c3d3146e GlobalISel: Allow bitcount ops to have different result type 
For AMDGPU the result is always 32-bit for 64-bit inputs.

llvm-svn: 352717
 2019-01-31 02:09:57 +00:00
Matt Arsenault
950eef38a4 GlobalISel: Implement fewerElementsVector for select 
llvm-svn: 352601
 2019-01-30 04:19:31 +00:00
Matt Arsenault
c0f6ba0750 AMDGPU/GlobalISel: Fix clamping shifts with 16-bit insts 
llvm-svn: 352599
 2019-01-30 03:36:25 +00:00
Matt Arsenault
882ab3af49 GlobalISel: Support narrowScalar for uneven loads 
llvm-svn: 352594
 2019-01-30 02:35:38 +00:00
Matt Arsenault
ab0a209220 GlobalISel: Partially implement widenScalar for MERGE_VALUES 
llvm-svn: 352560
 2019-01-29 23:17:35 +00:00
Matt Arsenault
a8f46258ff GlobalISel: Fix narrowScalar for load/store with different mem size 
This was ignoring the memory size, and producing multiple loads/stores
if the operand size was different from the memory size.

I assume this is the intent of not having an explicit G_ANYEXTLOAD
(although I think that would probably be better).

llvm-svn: 352523
 2019-01-29 18:13:02 +00:00
Matt Arsenault
f3e1caba88 GlobalISel: Implement narrowScalar for mul 
llvm-svn: 352300
 2019-01-27 00:52:51 +00:00
Matt Arsenault
c3c8febf0f GlobalISel: fewerElementsVector for intrinsic_trunc/intrinsic_round 
llvm-svn: 352298
 2019-01-27 00:12:21 +00:00
Matt Arsenault
fea3673936 AMDGPU/GlobalISel: Use scalarize instead of clampMaxNumElements 
llvm-svn: 352297
 2019-01-26 23:54:53 +00:00
Matt Arsenault
28f2390d55 AMDGPU/GlobalISel: Legalize more bit ops 
llvm-svn: 352295
 2019-01-26 23:47:07 +00:00
Matt Arsenault
f8f27c4b57 AMDGPU/GlobalISel: Widen small uaddo/usubo 
llvm-svn: 352294
 2019-01-26 23:44:51 +00:00
Matt Arsenault
f4a5a82995 AMDGPU/GlobalISel: Remove leftover setAction 
Also move G_GEP actions together.

llvm-svn: 352168
 2019-01-25 04:54:00 +00:00