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161,796 Commits 6 Branches 7 Tags
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36 Commits

Author SHA1 Message Date
Matt Arsenault
31cc123603 AMDGPU/GlobalISel: RegBankSelect for basic int ops 
llvm-svn: 327843
 2018-03-19 14:07:23 +00:00
Matt Arsenault
03e04be078 AMDGPU/GlobalISel: Cleanup constant legality 
llvm-svn: 327774
 2018-03-17 15:17:48 +00:00
Matt Arsenault
102bb413d0 AMDGPU/GlobalISel: Basic G_GEP legality 
llvm-svn: 327773
 2018-03-17 15:17:45 +00:00
Matt Arsenault
b6c1efb7d5 AMDGPU/GlobalISel: Basic legality for load/store 
llvm-svn: 327772
 2018-03-17 15:17:41 +00:00
Matt Arsenault
f488e6b295 AMDGPU/GlobalISel: Legality and RegBankInfo for G_{INSERT|EXTRACT}_VECTOR_ELT 
llvm-svn: 327269
 2018-03-12 13:35:53 +00:00
Matt Arsenault
def6781bbe AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal 
llvm-svn: 327267
 2018-03-12 13:35:43 +00:00
Matt Arsenault
e4700c1d8b AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo 
These are the parameters x86 already uses.

llvm-svn: 327020
 2018-03-08 16:24:16 +00:00
Matt Arsenault
4dc52d1fa3 AMDGPU/GlobalISel: Make some G_EXTRACTs legal 
As far as I can tell legalization of weird sizes for the
output type isn't implemented.

llvm-svn: 326714
 2018-03-05 16:25:15 +00:00
Matt Arsenault
4d5abaab3f AMDGPU/GlobalISel: Mark i32->i64 zext as legal 
llvm-svn: 326481
 2018-03-01 20:56:21 +00:00
Matt Arsenault
c940bb80d3 AMDGPU/GlobalISel: Make i32 mul legal 
llvm-svn: 326471
 2018-03-01 19:22:05 +00:00
Matt Arsenault
71bee857e8 AMDGPU/GlobalISel: Define instruction mapping for G_IMPLICIT_DEF 
Patch by Tom Stellard

llvm-svn: 326470
 2018-03-01 19:16:52 +00:00
Matt Arsenault
565e3b87de AMDGPU/GlobalISel: Make i32 xor legal 
llvm-svn: 326466
 2018-03-01 19:09:21 +00:00
Matt Arsenault
2869f6a9d5 AMDGPU/GlobalISel: Mark 32/64-bit G_FCMP as legal 
Patch by Tom Stellard

llvm-svn: 326465
 2018-03-01 19:09:16 +00:00
Matt Arsenault
2fc9c56a4c AMDGPU/GlobalISel: Mark 32-bit G_FPTOSI as legal 
Patch by Tom Stellard

llvm-svn: 326464
 2018-03-01 19:04:25 +00:00
Matt Arsenault
bc0507a97a AMDGPU/GlobalISel: Make f64 constants legal 
llvm-svn: 326101
 2018-02-26 17:20:43 +00:00
Yaxun Liu
c6e831c09d [AMDGPU] Change constant addr space to 4 
Differential Revision: https://reviews.llvm.org/D43170

llvm-svn: 325030
 2018-02-13 18:00:25 +00:00
Tom Stellard
13a03d5c2b AMDGPU/GlobalISel: Mark 32-bit G_FPTOUI as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D42152

llvm-svn: 324446
 2018-02-07 04:47:59 +00:00
Daniel Sanders
35939a70f0 [globalisel] Make LegalizerInfo::LegalizeAction available outside of LegalizerInfo. NFC 
Summary:
The improvements to the LegalizerInfo discussed in D42244 require that
LegalizerInfo::LegalizeAction be available for use in other classes. As such,
it needs to be moved out of LegalizerInfo. This has been done separately to the
next patch to minimize the noise in that patch.

llvm-svn: 323669
 2018-01-29 17:37:29 +00:00
David Blaikie
e01dc73ad2 Fix a bunch more layering of CodeGen headers that are in Target 
All these headers already depend on CodeGen headers so moving them into
CodeGen fixes the layering (since CodeGen depends on Target, not the
other way around).

llvm-svn: 318490
 2017-11-17 01:07:10 +00:00
Tom Stellard
1745f38fdd AMDGPU/GlobalISel: Mark 32-bit G_FADD as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D38439

llvm-svn: 316815
 2017-10-27 23:57:41 +00:00
Quentin Colombet
7b3de01101 [GlobalISel] Make GlobalISel a non-optional library. 
With this change, the GlobalISel library gets always built. In
particular, this is not possible to opt GlobalISel out of the build
using the LLVM_BUILD_GLOBAL_ISEL variable any more.

llvm-svn: 309990
 2017-08-03 21:52:25 +00:00
Tom Stellard
af1e4c3865 AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D36218

llvm-svn: 309898
 2017-08-02 22:56:30 +00:00
Tom Stellard
fc08a62082 AMDGPU/GlobalISel: Mark 32-bit G_OR as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D35127

llvm-svn: 309165
 2017-07-26 20:00:53 +00:00
Tom Stellard
4e1d2d8ecf AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34589

llvm-svn: 306298
 2017-06-26 15:56:52 +00:00
Tom Stellard
97740df1bf AMDGPU/GlobalISel: Mark 32-bit G_AND as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34349

llvm-svn: 306112
 2017-06-23 15:17:17 +00:00
Tom Stellard
4d87648db8 AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D34129

llvm-svn: 305692
 2017-06-19 13:15:45 +00:00
Tom Stellard
e6fc9ee805 AMDGPU/GlobalISel: Mark 32-bit G_ADD as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D33992

llvm-svn: 305232
 2017-06-12 20:54:56 +00:00
Tom Stellard
2b4444d873 AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33949

llvm-svn: 304910
 2017-06-07 13:54:51 +00:00
Tom Stellard
80965a9e56 AMDGPU/GlobalISel: Mark 32-bit G_ICMP as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33890

llvm-svn: 304797
 2017-06-06 14:16:50 +00:00
Chandler Carruth
eb66b33867 Sort the remaining #include lines in include/... and lib/.... 
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

llvm-svn: 304787
 2017-06-06 11:49:48 +00:00
Tom Stellard
6a773e4535 AMDGPU/GlobalISel: Mark 1-bit integer constants as legal 
Summary:
These are mostly legal, but will probably need special lowering for some
cases.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D33791

llvm-svn: 304628
 2017-06-03 01:13:33 +00:00
Tom Stellard
69bcb42fb7 AMDGPU/GlobalISel: Mark 32-bit float constants as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33212

llvm-svn: 304003
 2017-05-26 16:40:03 +00:00
Tom Stellard
e65dcab676 AMDGPU/GlobalISel: Mark 32-bit integer constants as legal 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33115

llvm-svn: 302919
 2017-05-12 16:46:46 +00:00
Tom Stellard
f2ec17e0e6 Re-commit AMDGPU/GlobalISel: Add support for simple shaders 
Fix build when global-isel is disabled and fix a warning.

Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

llvm-svn: 293551
 2017-01-30 21:56:46 +00:00
Tom Stellard
d839aa304c Revert "AMDGPU/GlobalISel: Add support for simple shaders" 
This reverts commit r293503.

Revert while I investigate some of the buildbot failures.

llvm-svn: 293509
 2017-01-30 17:42:41 +00:00
Tom Stellard
ca8f087f31 AMDGPU/GlobalISel: Add support for simple shaders 
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

llvm-svn: 293503
 2017-01-30 17:09:15 +00:00