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60 Commits

Author SHA1 Message Date
Brian Gaeke
1b07a2282a Include SparcV9RegInfo.h instead of TargetRegInfo.h. This serves as a bit of 
documentation that this module needs to be made independent of the
register file description of the current target.

llvm-svn: 13125
 2004-04-23 18:15:46 +00:00
Chris Lattner
e672426e5d Eliminate operator[] is deprecated warnings 
llvm-svn: 11578
 2004-02-18 16:43:51 +00:00
Alkis Evlogimenos
6d6ab846af Remove getAllocatedRegNum(). Use getReg() instead. 
llvm-svn: 11393
 2004-02-13 21:01:20 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Brian Gaeke
4d67c9770d getOpCode() --> getOpcode(). 
llvm-svn: 11339
 2004-02-12 01:34:05 +00:00
Brian Gaeke
60268b265f Make SchedGraph::dump() use SchedGraphNodeCommon's const_iterator 
instead of randomly groping about inside its outEdges array.
Make SchedGraph::addDummyEdges() use getNumOutEdges() instead of
outEdges.size().
Get rid of ifdefed-out code in SchedGraph::buildGraph().

llvm-svn: 11238
 2004-02-09 18:42:05 +00:00
Alkis Evlogimenos
29127b8825 Change interface of MachineOperand as follows: 
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
 2003-12-14 13:24:17 +00:00
Brian Gaeke
d25f86d683 Put all LLVM code into the llvm namespace, as per bug 109. 
llvm-svn: 9903
 2003-11-11 22:41:34 +00:00
Misha Brukman
6667a74caf Let's not forget about our friends -- Constant Pool indices. 
llvm-svn: 9750
 2003-11-06 00:04:11 +00:00
John Criswell
b402729b30 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.

llvm-svn: 9298
 2003-10-20 19:43:21 +00:00
John Criswell
588d65ae68 Fixed two double free bugs that caused llc to segfault or run forever. 
llvm-svn: 8191
 2003-08-28 21:43:17 +00:00
Tanya Lattner
7ce05c067d Moved index into BB to common graph class because its needed by ModuloSchedGraph. 
llvm-svn: 8174
 2003-08-28 15:30:40 +00:00
Tanya Lattner
78d4730ae6 *** empty log message *** 
llvm-svn: 8153
 2003-08-27 02:42:58 +00:00
Tanya Lattner
f172cf418d First version of SchedGraph common class and refactoring of SchedGraph. 
llvm-svn: 8148
 2003-08-25 22:42:20 +00:00
Vikram S. Adve
daa346c89a A def. operand of a machine instruction may be an ordinary Value*, 
not just an Instruction*, at least in one unfortunate case:
the first operand to the va_arg instruction.
Modify ValueToDefVecMap to map from Value*, not Instruction*.

llvm-svn: 7052
 2003-07-02 01:16:01 +00:00
Vikram S. Adve
2d906f4550 Changes to allow explicit physical register arguments that have been 
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.

llvm-svn: 6467
 2003-05-31 07:37:05 +00:00
Vikram S. Adve
681b3c77fa (1) Added special register class containing (for now) %fsr. 
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341
 2003-05-27 00:05:23 +00:00
Misha Brukman
daf2cc3c48 Cleaned up code layout. No functional changes. 
llvm-svn: 6304
 2003-05-22 21:49:18 +00:00
Misha Brukman
7d91017b21 Kill `using' directives. 
llvm-svn: 6301
 2003-05-22 21:24:35 +00:00
Chris Lattner
b27d60ccf1 Rename MachineInstrInfo -> TargetInstrInfo 
llvm-svn: 5272
 2003-01-14 22:00:31 +00:00
Chris Lattner
dfa3c21f1c More renamings of Target/Machine*Info to Target/Target*Info 
llvm-svn: 5204
 2002-12-29 03:13:05 +00:00
Chris Lattner
a7ca1bd65c Remove usage of MachineBasicBlock::get 
llvm-svn: 4341
 2002-10-28 18:50:08 +00:00
Chris Lattner
e309cdbc95 Rename the redundant MachineOperand::getOperandType() to MachineOperand::getType() 
llvm-svn: 4331
 2002-10-28 04:45:29 +00:00
Chris Lattner
dd22b9e8b6 Add #includes now that MachineInstr.h doesn't include llvm/Target/MachineInstrInfo.h 
llvm-svn: 4327
 2002-10-28 02:28:39 +00:00
Chris Lattner
b8c6acfbc0 Rename MachineCodeForBasicBlock to MachineBasicBlock 
llvm-svn: 4318
 2002-10-28 01:41:47 +00:00
Vikram S. Adve
211f972d28 Major bug fix: was not adding CD edges for RETURNs! 
llvm-svn: 4137
 2002-10-13 00:39:22 +00:00
Chris Lattner
12af061d07 Very minor cleanups 
llvm-svn: 3271
 2002-08-09 18:55:18 +00:00
Chris Lattner
05fe67c0d2 *** empty log message *** 
llvm-svn: 3075
 2002-07-25 06:17:51 +00:00
Chris Lattner
9860e64083 *** empty log message *** 
llvm-svn: 3056
 2002-07-24 21:21:32 +00:00
Vikram S. Adve
4efbb9c931 A single MachineInstr operand may now be both a def and a use, 
so additional dep. edges have to be added.
This was needed to correctly handle conditional move instructions!
MachineCodeForBasicBlock is now an annotation on BasicBlock.
Renamed "earliestForNode" to "earliestReadyTimeForNode".

llvm-svn: 2826
 2002-07-08 22:59:23 +00:00
Chris Lattner
dfd421a7df MEGAPATCH checkin. 
For details, See: docs/2002-06-25-MegaPatchInfo.txt

llvm-svn: 2779
 2002-06-25 16:13:24 +00:00
Chris Lattner
96e0c48175 Eliminate duplicate or unneccesary #include's 
llvm-svn: 2397
 2002-04-29 17:42:12 +00:00
Chris Lattner
cd23d94446 Clean up the ownership model a bit so that nodes actually get deleted more 
frequently. This still leaks edges quite a bit, but it leaks no nodes
(I think).

llvm-svn: 2190
 2002-04-09 05:15:33 +00:00
Chris Lattner
bc15ae64dd Change references to the Method class to be references to the Function 
class.  The Method class is obsolete (renamed) and all references to it
are being converted over to Function.

llvm-svn: 2144
 2002-04-07 20:49:59 +00:00
Vikram S. Adve
d18a1cc9fb Minor changes. 
llvm-svn: 1971
 2002-03-24 03:40:59 +00:00
Chris Lattner
a58db0f194 * Straighten out #includes 
* Switch from MachineCodeForVMInstr to MachineCodeForInstruction model

llvm-svn: 1644
 2002-02-03 07:29:45 +00:00
Chris Lattner
3dc9a2a61f Changes to build successfully with GCC 3.02 
llvm-svn: 1503
 2002-01-20 22:54:45 +00:00
Chris Lattner
463cc31132 Create a new #include "Support/..." directory structure to move things 
from "llvm/Support/..." that are not llvm dependant.

Move files and fix #includes

llvm-svn: 1400
 2001-11-27 00:03:19 +00:00
Chris Lattner
b914467e57 Stuff after a #endif is not valid CPP input and breaks some compilers 
llvm-svn: 1375
 2001-11-26 18:56:52 +00:00
Vikram S. Adve
624846d3fd Eliminate most uses of the machine instruction vector for each LLVM instr, 
since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.

llvm-svn: 1269
 2001-11-12 18:53:43 +00:00
Vikram S. Adve
3a5bf13976 Major improvement to how nodes are built for a BB. 
LLVM instruction is no longer recorded in each node, but BB is.

llvm-svn: 1262
 2001-11-12 14:18:01 +00:00
Vikram S. Adve
0b0bd6e749 Only add true dep. edges from an earlier to a later instruction. 
This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!

llvm-svn: 1254
 2001-11-11 01:23:27 +00:00
Vikram S. Adve
841ffd6a44 Major change to how defs are found when adding dependences (they 
are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before.  It is now.

llvm-svn: 1199
 2001-11-08 05:20:23 +00:00
Vikram S. Adve
c3993d28ca Modified graph construction to use one pass to find all defs. 
Avoids having to handle some special cases that cause complex interactions
with instr. selection.

llvm-svn: 1138
 2001-11-05 04:04:23 +00:00
Vikram S. Adve
9515b10102 Add edges between call instructions and (a) load/store instructions, and 
(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.

llvm-svn: 1008
 2001-10-28 21:43:33 +00:00
Vikram S. Adve
41be9ce333 *** empty log message *** 
llvm-svn: 857
 2001-10-17 23:53:16 +00:00
Chris Lattner
b9e0153cfe * Fix privacy issues on RegToRefVecMap 
* Fix initialization order problems...

llvm-svn: 762
 2001-10-13 06:51:01 +00:00
Vikram S. Adve
1fe4d4071c Add graph edges due to implicit refs in each machine instruction. 
llvm-svn: 724
 2001-10-11 04:22:45 +00:00
Vikram S. Adve
623324dea9 Don't insert useful instructions in delay slot of a RETURN. 
llvm-svn: 721
 2001-10-10 20:58:11 +00:00
Chris Lattner
08b1dde37e Commit more code over to new cast style 
llvm-svn: 697
 2001-10-02 03:41:24 +00:00