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archived-llvm-mirror/lib/Target/AMDGPU
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Petar Avramovic 29902ee1b4 AMDGPU/GlobalISel: Fix negative offset folding for buffer_load 
Buffer_load does unsigned offset calculations. Don't fold
operands of 32-bit add that are likely to cause unsigned add
overflow (common case is when one of the operands is negative).

Differential Revision: https://reviews.llvm.org/D91336
2021-04-27 14:45:22 +02:00
..
AsmParser
[AMDGPU][MC] Corrected parsing of carry in/out operands in VOP3
2021-04-19 13:42:31 +03:00
Disassembler
[MC][AMDGPU][llvm-objdump] Synthesized local labels in disassembly
2021-04-26 13:56:36 +01:00
MCTargetDesc
[AMDGPU][MC][NFC] Removed extra spaces
2021-04-12 13:33:19 +03:00
TargetInfo
llvmbuildectomy - replace llvm-build by plain cmake
2020-11-13 10:35:24 +01:00
Utils
[AMDGPU] Move LDS lowering related utility functions to a separate utils file.
2021-04-16 00:15:48 +05:30
AMDGPU.h
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
AMDGPU.td
[AMDGPU] Factor out predicate FmaakFmamkF32Insts
2021-04-15 12:29:16 -07:00
AMDGPUAliasAnalysis.cpp
[NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset.
2021-04-09 12:54:22 +03:00
AMDGPUAliasAnalysis.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Disable forceful inline of non-kernel functions which use LDS.
2021-04-15 09:12:56 +05:30
AMDGPUAnnotateKernelFeatures.cpp
[AMDGPU] Remove error check for indirect calls and add missing queue-ptr
2021-04-20 00:35:17 +05:30
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Simplify AMDGPUAnnotateUniformValues::visitBranchInst. NFC.
2021-03-23 16:54:43 +00:00
AMDGPUArgumentUsageInfo.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUAsmPrinter.cpp
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPUAsmPrinter.h
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Use reductions instead of scans in the atomic optimizer
2021-03-26 15:38:14 +00:00
AMDGPUCallingConv.td
[AMDGPU] Fix large return values with amdgpu_gfx
2021-04-15 14:57:56 +02:00
AMDGPUCallLowering.cpp
GlobalISel: Preserve source value information for outgoing byval args
2021-03-18 09:16:54 -04:00
AMDGPUCallLowering.h
GlobalISel: Merge and cleanup more AMDGPU call lowering code
2021-03-02 17:31:13 -05:00
AMDGPUCodeGenPrepare.cpp
Normalize interaction with boolean attributes
2021-04-17 08:17:33 +02:00
AMDGPUCombine.td
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
AMDGPUExportClustering.cpp
[AMDGPU][MC] Refactored exp tgt handling
2021-01-26 14:54:15 +03:00
AMDGPUExportClustering.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUFeatures.td
AMDGPU: Change internal tracking of wave size
2020-06-01 17:55:08 -04:00
AMDGPUFixFunctionBitcasts.cpp
AMDGPU.h - reduce TargetMachine.h include. NFC.
2020-05-24 15:27:41 +01:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping
2020-08-17 09:53:26 -04:00
AMDGPUGISel.td
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
AMDGPUGlobalISelUtils.cpp
[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset
2021-01-28 11:20:09 +01:00
AMDGPUGlobalISelUtils.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPUHSAMetadataStreamer.h
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPUInstCombineIntrinsic.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
AMDGPUInstrInfo.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUInstrInfo.td
[AMDGPU]: Fixes an invalid clamp selection pattern.
2021-02-08 13:06:30 +01:00
AMDGPUInstructions.td
[AMDGPU] Inline FSHRPattern into its only use. NFC.
2021-03-26 09:32:02 +00:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Use SIInstrFlags for flat variants. NFC
2021-04-09 12:28:36 +02:00
AMDGPUInstructionSelector.h
[AMDGPU] Use SIInstrFlags for flat variants. NFC
2021-04-09 12:28:36 +02:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Factor out SelectSAddrFI()
2021-04-14 09:40:02 -07:00
AMDGPUISelLowering.cpp
[AMDGPU][SelectionDAG] Don't combine uniform multiplies to MUL_[UI]24
2021-02-23 15:39:19 +00:00
AMDGPUISelLowering.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPULateCodeGenPrepare.cpp
[OpaquePtrs] Remove some uses of type-less CreateLoad APIs (NFC)
2021-03-11 14:40:57 +01:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Fix uitofp/sitofp with non-power-of-2 integers
2021-04-20 11:13:29 -04:00
AMDGPULegalizerInfo.h
[AMDGPU] Remove dead dcode (NFC).
2021-04-16 23:03:31 +05:30
AMDGPULibCalls.cpp
Normalize interaction with boolean attributes
2021-04-17 08:17:33 +02:00
AMDGPULibFunc.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPULibFunc.h
AMDGPULibFunc - fix include order. NFC.
2020-05-24 13:25:59 +01:00
AMDGPULowerIntrinsics.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
AMDGPULowerKernelArguments.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
AMDGPULowerKernelAttributes.cpp
Normalize interaction with boolean attributes
2021-04-17 08:17:33 +02:00
AMDGPULowerModuleLDSPass.cpp
[AMDGPU] Move LDS lowering related utility functions to a separate utils file.
2021-04-16 00:15:48 +05:30
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Fix build breakage
2021-02-14 09:02:55 -08:00
AMDGPUMachineFunction.cpp
Normalize interaction with boolean attributes
2021-04-17 08:17:33 +02:00
AMDGPUMachineFunction.h
[amdgpu] Implement lower function LDS pass
2021-03-15 15:24:01 +00:00
AMDGPUMachineModuleInfo.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUMachineModuleInfo.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUMacroFusion.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
AMDGPUMacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUMCInstLower.cpp
[AMDGPU] Remove SI_MASK_BRANCH
2021-03-09 09:13:23 +08:00
AMDGPUMIRFormatter.cpp
[AMDGPU] Implement mir parseCustomPseudoSourceValue
2021-01-22 11:24:08 +01:00
AMDGPUMIRFormatter.h
[AMDGPU] Implement mir parseCustomPseudoSourceValue
2021-01-22 11:24:08 +01:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUPerfHintAnalysis.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUPostLegalizerCombiner.cpp
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
AMDGPUPreLegalizerCombiner.cpp
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
AMDGPUPrintfRuntimeBinding.cpp
AMDGPUPrintfRuntimeBinding - don't dereference a dyn_cast<> pointer. NFCI.
2021-01-28 12:38:44 +00:00
AMDGPUPromoteAlloca.cpp
[amdgpu] Implement lower function LDS pass
2021-03-15 15:24:01 +00:00
AMDGPUPropagateAttributes.cpp
Revert "[IndirectFunctions] Skip propagating attributes to address taken functions"
2021-01-25 15:58:06 -05:00
AMDGPUPTNote.h
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPURegBankCombiner.cpp
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
AMDGPURegisterBankInfo.cpp
AMDGPU/GlobalISel: Fix negative offset folding for buffer_load
2021-04-27 14:45:22 +02:00
AMDGPURegisterBankInfo.h
[AMDGPU][GlobalISel] Use scalar min/max instructions
2021-02-04 17:04:32 +00:00
AMDGPURegisterBanks.td
AMDGPU/GlobalISel: Add SReg_96 to SGPRRegBank
2020-07-28 16:49:55 -04:00
AMDGPURewriteOutArguments.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUSearchableTables.td
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUSubtarget.cpp
[AMDGPU] Split dot2-insts feature
2021-03-17 09:42:21 +00:00
AMDGPUSubtarget.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUTargetMachine.cpp
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
AMDGPUTargetMachine.h
[AMDGPU] Disable forceful inline of non-kernel functions which use LDS.
2021-04-15 09:12:56 +05:30
AMDGPUTargetObjectFile.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDGPUTargetObjectFile.h
AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC.
2020-05-24 13:57:02 +01:00
AMDGPUTargetTransformInfo.cpp
[TTI] NFC: Use InstructionCost to store ScalarizationCost in IntrinsicCostAttributes.
2021-04-23 18:02:00 +03:00
AMDGPUTargetTransformInfo.h
[TTI] NFC: Change getVectorSplitCost to return InstructionCost
2021-04-21 17:32:02 +03:00
AMDGPUUnifyDivergentExitNodes.cpp
[llvm] Populate SmallVector at construction time (NFC)
2021-01-28 22:21:14 -08:00
AMDGPUUnifyMetadata.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
AMDILCFGStructurizer.cpp
[NewPM] Cleanup IR printing instrumentation
2021-04-15 09:50:55 -07:00
AMDKernelCodeT.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
BUFInstructions.td
[AMDGPU] Set SchedRW on real instructions
2021-03-23 15:38:11 +00:00
CaymanInstructions.td
[AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM
2020-07-08 19:14:49 +01:00
CMakeLists.txt
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
DSInstructions.td
[AMDGPU] Re-arrange ds_read/ds_write ISel pattern for better readability.
2021-04-20 16:17:15 +05:30
EvergreenInstructions.td
[AMDGPU] Inline FSHRPattern into its only use. NFC.
2021-03-26 09:32:02 +00:00
EXPInstructions.td
[AMDGPU] Separate out real exp instructions by subtarget. NFC.
2020-11-11 17:13:40 +00:00
FLATInstructions.td
AMDGPU: Restore atomic fp feature on FP atomic instruction definitions
2021-04-22 21:32:01 -04:00
GCNDPPCombine.cpp
[AMDGPU] GCNDPPCombine: don't shrink V_ADD_CO_U32 if carry out is used
2021-04-20 09:17:52 +01:00
GCNHazardRecognizer.cpp
[AMDGPU] Don't check for VMEM hazards on GFX10
2021-03-04 21:44:56 +00:00
GCNHazardRecognizer.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNILPSched.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNIterativeScheduler.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
GCNIterativeScheduler.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNMinRegStrategy.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
GCNNSAReassign.cpp
[AMDGPU] Do not reassign spilled registers
2021-01-27 16:29:05 -08:00
GCNProcessors.td
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNRegPressure.cpp
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNRegPressure.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNSchedStrategy.cpp
[AMDGPU] Avoid second rescheduling for some regions
2021-02-26 12:29:37 -08:00
GCNSchedStrategy.h
[AMDGPU] Avoid second rescheduling for some regions
2021-02-26 12:29:37 -08:00
GCNSubtarget.h
[AMDGPU] Factor out predicate FmaakFmamkF32Insts
2021-04-15 12:29:16 -07:00
InstCombineTables.td
[InstCombine] Move target-specific inst combining
2020-07-22 15:59:49 +02:00
MIMGInstructions.td
[AMDGPU] Use if instead of foreach in a few places. NFC.
2021-04-20 14:20:30 +01:00
R600.td
…
R600AsmPrinter.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600ControlFlowFinalizer.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600Defines.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
R600EmitClauseMarkers.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600ExpandSpecialInstrs.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600FrameLowering.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600FrameLowering.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
R600InstrFormats.td
…
R600InstrInfo.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600InstrInfo.h
Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate
2020-10-21 11:52:47 +01:00
R600Instructions.td
[NFC] Remove unused GetUnderlyingObject paramenter
2020-07-31 02:10:03 -07:00
R600ISelLowering.cpp
[NFC] Simplify expression
2021-02-05 10:17:02 +00:00
R600ISelLowering.h
[TargetLowering] Use Align in allowsMisalignedMemoryAccesses.
2021-02-04 19:22:06 -08:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600MachineScheduler.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600OpenCLImageTypeLoweringPass.cpp
TransformUtils: Fix metadata handling in CloneModule (and improve CloneFunctionInto)
2021-02-15 11:56:00 -08:00
R600OptimizeVectorRegisters.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600Packetizer.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600Processors.td
…
R600RegisterInfo.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R600RegisterInfo.h
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
2020-08-20 17:59:11 +01:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.h
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Do not annotate an else branch if there is a kill
2021-03-12 11:52:08 +09:00
SIDefines.h
[AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
2021-04-09 11:20:31 +02:00
SIFixSGPRCopies.cpp
[AMDGPU] Introduce Strict WQM mode
2021-03-03 14:19:16 +01:00
SIFixVGPRCopies.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIFoldOperands.cpp
AMDGPU: Fix assert on inline asm on gfx90a
2021-04-23 09:00:25 -04:00
SIFormMemoryClauses.cpp
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
SIFrameLowering.cpp
[AMDGPU] Save WWM registers in functions
2021-04-23 18:09:24 +02:00
SIFrameLowering.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
SIInsertHardClauses.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIInsertWaitcnts.cpp
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
SIInstrFormats.td
[AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
2021-04-09 11:20:31 +02:00
SIInstrInfo.cpp
[AMDGPU] Allow multiple uses of the same literal
2021-04-20 16:44:01 +01:00
SIInstrInfo.h
[AMDGPU] Use SIInstrFlags for flat variants. NFC
2021-04-09 12:28:36 +02:00
SIInstrInfo.td
[AMDGPU] Add new EmitDstSel field to VOPPofile. NFC.
2021-04-15 12:07:08 -07:00
SIInstructions.td
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
SIISelLowering.cpp
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
SIISelLowering.h
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
SILateBranchLowering.cpp
[AMDGPU] Add MDT update missing from D98915
2021-03-20 13:38:58 +09:00
SILoadStoreOptimizer.cpp
[AMDGPU] Fixed msan failure with uninitialized value
2021-03-15 13:58:19 -07:00
SILowerControlFlow.cpp
[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic
2021-02-15 08:45:46 +09:00
SILowerI1Copies.cpp
[Target] Use llvm::append_range (NFC)
2021-01-24 12:18:56 -08:00
SILowerSGPRSpills.cpp
[AMDGPU] Free reserved VGPR if no SGPR spill
2021-03-12 08:11:14 +08:00
SIMachineFunctionInfo.cpp
[AMDGPU] Save VGPR of whole wave when spilling
2021-04-12 11:01:38 +02:00
SIMachineFunctionInfo.h
[AMDGPU] Use MapVector for WWMReservedRegs
2021-04-26 17:43:00 +02:00
SIMachineScheduler.cpp
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
SIMachineScheduler.h
[NFC][AMDGPU] Reduce include files dependency.
2021-01-07 22:22:05 +03:00
SIMemoryLegalizer.cpp
[AMDGPU] Update gfx90a memory model support
2021-04-07 22:17:58 +00:00
SIModeRegister.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIOptimizeExecMasking.cpp
[AMDGPU] Move kill lowering to WQM pass and add live mask tracking
2021-02-11 20:31:29 +09:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy
2021-03-24 14:14:13 +03:00
SIPeepholeSDWA.cpp
[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20 22:22:45 +03:00
SIPostRABundler.cpp
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
SIPreAllocateWWMRegs.cpp
[AMDGPU] Save WWM registers in functions
2021-04-23 18:09:24 +02:00
SIPreEmitPeephole.cpp
[AMDGPU] Rename SIInsertSkips Pass
2021-03-20 11:48:04 +09:00
SIProgramInfo.cpp
[AMDGPU] Set rsrc1 flags for graphics shaders
2020-11-04 12:25:41 +01:00
SIProgramInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
SIRegisterInfo.cpp
[AMDGPU] Save WWM registers in functions
2021-04-23 18:09:24 +02:00
SIRegisterInfo.h
[AMDGPU] Unify spill code
2021-04-12 11:19:08 +02:00
SIRegisterInfo.td
[AMDGPU] Use if instead of foreach in a few places. NFC.
2021-04-20 14:20:30 +01:00
SISchedule.td
[AMDGPU] Add TransVALU to gfx10
2021-04-20 15:34:43 +02:00
SIShrinkInstructions.cpp
[AMDGPU] Avoid an illegal operand in si-shrink-instructions
2021-01-28 08:49:21 +01:00
SIWholeQuadMode.cpp
[AMDGPU] SIWholeQuadMode: don't add duplicate implicit $exec operands
2021-04-22 09:19:47 +01:00
SMInstructions.td
[AMDGPU][MC][GFX9] Corrected SMEM decoding
2021-04-06 14:10:46 +03:00
SOPInstructions.td
AMDGPU: Add isBranch=1 to SOPP branch instructions
2021-04-06 10:59:30 -04:00
VIInstrFormats.td
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VOP1Instructions.td
[AMDGPU] Remove redundant field from DPP8 def
2021-04-16 16:23:52 -04:00
VOP2Instructions.td
[AMDGPU] Remove redundant field from DPP8 def
2021-04-16 16:23:52 -04:00
VOP3Instructions.td
[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices
2021-04-01 14:21:00 +03:00
VOP3PInstructions.td
[AMDGPU] Refactor VOP3P Profile and AsmParser, NFC
2021-04-16 13:06:50 -04:00
VOPCInstructions.td
[AMDGPU] Add new EmitDstSel field to VOPPofile. NFC.
2021-04-15 12:07:08 -07:00
VOPInstructions.td
[AMDGPU] Add new EmitDstSel field to VOPPofile. NFC.
2021-04-15 12:07:08 -07:00