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https://github.com/RPCS3/llvm-mirror.git
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3a9a1ac61b
For some reason there are both of these available, except for scalar 64-bit compares which only has u64. I'm not sure why there are both (I'm guessing it's for the one bit inputs we don't use), but for consistency always using the unsigned one. llvm-svn: 282832
270 lines
10 KiB
LLVM
270 lines
10 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare i7 @llvm.ctlz.i7(i7, i1) nounwind readnone
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declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
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declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
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declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone
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declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
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declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone
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declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1) nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; FUNC-LABEL: {{^}}s_ctlz_i32:
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; GCN: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
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; GCN-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]]
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; GCN-DAG: v_cmp_eq_u32_e64 [[CMPZ:s\[[0-9]+:[0-9]+\]]], [[VAL]], 0{{$}}
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; GCN-DAG: v_mov_b32_e32 [[VCTLZ:v[0-9]+]], [[CTLZ]]
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; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[VCTLZ]], 32, [[CMPZ]]
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; GCN: buffer_store_dword [[RESULT]]
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; GCN: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @s_ctlz_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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store i32 %ctlz, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i32:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]],
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; GCN-DAG: v_ffbh_u32_e32 [[CTLZ:v[0-9]+]], [[VAL]]
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; GCN-DAG: v_cmp_eq_u32_e32 vcc, 0, [[CTLZ]]
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; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[CTLZ]], 32, vcc
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; GCN: buffer_store_dword [[RESULT]],
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; GCN: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @v_ctlz_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr, align 4
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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store i32 %ctlz, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_v2i32:
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; GCN: buffer_load_dwordx2
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; GCN: v_ffbh_u32_e32
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; GCN: v_ffbh_u32_e32
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; GCN: buffer_store_dwordx2
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; GCN: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @v_ctlz_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) nounwind {
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%val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr, align 8
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %val, i1 false) nounwind readnone
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store <2 x i32> %ctlz, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_v4i32:
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; GCN: buffer_load_dwordx4
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; GCN: v_ffbh_u32_e32
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; GCN: v_ffbh_u32_e32
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; GCN: v_ffbh_u32_e32
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; GCN: v_ffbh_u32_e32
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; GCN: buffer_store_dwordx4
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; GCN: s_endpgm
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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define void @v_ctlz_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %valptr) nounwind {
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%val = load <4 x i32>, <4 x i32> addrspace(1)* %valptr, align 16
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%ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %val, i1 false) nounwind readnone
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store <4 x i32> %ctlz, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i8:
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; GCN: buffer_load_ubyte [[VAL:v[0-9]+]],
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; GCN-DAG: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]]
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; GCN-DAG: v_cmp_eq_u32_e32 vcc, 0, [[CTLZ]]
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; GCN-DAG: v_cndmask_b32_e64 [[CORRECTED_FFBH:v[0-9]+]], [[FFBH]], 32, vcc
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; GCN: v_add_i32_e32 [[RESULT:v[0-9]+]], vcc, 0xffffffe8, [[CORRECTED_FFBH]]
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; GCN: buffer_store_byte [[RESULT]],
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define void @v_ctlz_i8(i8 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %valptr) nounwind {
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%val = load i8, i8 addrspace(1)* %valptr
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%ctlz = call i8 @llvm.ctlz.i8(i8 %val, i1 false) nounwind readnone
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store i8 %ctlz, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_ctlz_i64:
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; GCN: s_load_dwordx2 s{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
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; GCN-DAG: v_cmp_eq_u32_e64 vcc, s[[HI]], 0{{$}}
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; GCN-DAG: s_flbit_i32_b32 [[FFBH_LO:s[0-9]+]], s[[LO]]
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; GCN-DAG: s_add_i32 [[ADD:s[0-9]+]], [[FFBH_LO]], 32
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; GCN-DAG: s_flbit_i32_b32 [[FFBH_HI:s[0-9]+]], s[[HI]]
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; GCN-DAG: v_mov_b32_e32 [[VFFBH_LO:v[0-9]+]], [[ADD]]
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; GCN-DAG: v_mov_b32_e32 [[VFFBH_HI:v[0-9]+]], [[FFBH_HI]]
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; GCN-DAG: v_cndmask_b32_e32 v[[CTLZ:[0-9]+]], [[VFFBH_HI]], [[VFFBH_LO]]
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; GCN-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}}
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; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v{{\[}}[[CTLZ]]:[[CTLZ_HI]]{{\]}}
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define void @s_ctlz_i64(i64 addrspace(1)* noalias %out, i64 %val) nounwind {
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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store i64 %ctlz, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_ctlz_i64_trunc:
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define void @s_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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%trunc = trunc i64 %ctlz to i32
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store i32 %trunc, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i64:
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; GCN-DAG: v_mov_b32_e32 v[[CTLZ_HI:[0-9]+]], 0{{$}}
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; GCN-DAG: {{buffer|flat}}_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
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; GCN-DAG: v_cmp_eq_u32_e64 [[CMPHI:s\[[0-9]+:[0-9]+\]]], 0, v[[HI]]
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; GCN-DAG: v_ffbh_u32_e32 [[FFBH_LO:v[0-9]+]], v[[LO]]
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; GCN-DAG: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, 32, [[FFBH_LO]]
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; GCN-DAG: v_ffbh_u32_e32 [[FFBH_HI:v[0-9]+]], v[[HI]]
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; GCN-DAG: v_cndmask_b32_e64 v[[CTLZ:[0-9]+]], [[FFBH_HI]], [[ADD]], [[CMPHI]]
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; GCN-DAG: v_or_b32_e32 [[OR:v[0-9]+]], v[[HI]], v[[LO]]
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; GCN-DAG: v_cmp_eq_u32_e32 vcc, 0, [[OR]]
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; GCN-DAG: v_cndmask_b32_e64 v[[CLTZ_LO:[0-9]+]], v[[CTLZ:[0-9]+]], 64, vcc
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; GCN: {{buffer|flat}}_store_dwordx2 {{.*}}v{{\[}}[[CLTZ_LO]]:[[CTLZ_HI]]{{\]}}
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define void @v_ctlz_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
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%val = load i64, i64 addrspace(1)* %in.gep
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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store i64 %ctlz, i64 addrspace(1)* %out.gep
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i64_trunc:
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define void @v_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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%val = load i64, i64 addrspace(1)* %in.gep
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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%trunc = trunc i64 %ctlz to i32
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store i32 %trunc, i32 addrspace(1)* %out.gep
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_neg1:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]],
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; GCN: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; GCN: buffer_store_dword [[RESULT]],
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; GCN: s_endpgm
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define void @v_ctlz_i32_sel_eq_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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%cmp = icmp eq i32 %val, 0
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%sel = select i1 %cmp, i32 -1, i32 %ctlz
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store i32 %sel, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_neg1:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]],
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; GCN: v_ffbh_u32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; GCN: buffer_store_dword [[RESULT]],
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; GCN: s_endpgm
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define void @v_ctlz_i32_sel_ne_neg1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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%cmp = icmp ne i32 %val, 0
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%sel = select i1 %cmp, i32 %ctlz, i32 -1
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store i32 %sel, i32 addrspace(1)* %out
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ret void
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}
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; TODO: Should be able to eliminate select here as well.
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; FUNC-LABEL: {{^}}v_ctlz_i32_sel_eq_bitwidth:
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; GCN: buffer_load_dword
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; GCN: v_ffbh_u32_e32
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; GCN: v_cmp
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; GCN: v_cndmask
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; GCN: s_endpgm
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define void @v_ctlz_i32_sel_eq_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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%cmp = icmp eq i32 %ctlz, 32
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%sel = select i1 %cmp, i32 -1, i32 %ctlz
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store i32 %sel, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i32_sel_ne_bitwidth:
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; GCN: buffer_load_dword
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; GCN: v_ffbh_u32_e32
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; GCN: v_cmp
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; GCN: v_cndmask
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; GCN: s_endpgm
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define void @v_ctlz_i32_sel_ne_bitwidth(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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%cmp = icmp ne i32 %ctlz, 32
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%sel = select i1 %cmp, i32 %ctlz, i32 -1
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store i32 %sel, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i8_sel_eq_neg1:
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; GCN: buffer_load_ubyte [[VAL:v[0-9]+]],
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; GCN: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]]
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; GCN: buffer_store_byte [[FFBH]],
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define void @v_ctlz_i8_sel_eq_neg1(i8 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %valptr) nounwind {
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%val = load i8, i8 addrspace(1)* %valptr
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%ctlz = call i8 @llvm.ctlz.i8(i8 %val, i1 false) nounwind readnone
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%cmp = icmp eq i8 %val, 0
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%sel = select i1 %cmp, i8 -1, i8 %ctlz
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store i8 %sel, i8 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i16_sel_eq_neg1:
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; SI: buffer_load_ushort [[VAL:v[0-9]+]],
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; SI: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]]
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; SI: buffer_store_short [[FFBH]],
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define void @v_ctlz_i16_sel_eq_neg1(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) nounwind {
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%val = load i16, i16 addrspace(1)* %valptr
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%ctlz = call i16 @llvm.ctlz.i16(i16 %val, i1 false) nounwind readnone
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%cmp = icmp eq i16 %val, 0
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%sel = select i1 %cmp, i16 -1, i16 %ctlz
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store i16 %sel, i16 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i7_sel_eq_neg1:
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; GCN: buffer_load_ubyte [[VAL:v[0-9]+]],
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; GCN: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]]
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; GCN: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0x7f, [[FFBH]]
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; GCN: buffer_store_byte [[TRUNC]],
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define void @v_ctlz_i7_sel_eq_neg1(i7 addrspace(1)* noalias %out, i7 addrspace(1)* noalias %valptr) nounwind {
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%val = load i7, i7 addrspace(1)* %valptr
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%ctlz = call i7 @llvm.ctlz.i7(i7 %val, i1 false) nounwind readnone
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%cmp = icmp eq i7 %val, 0
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%sel = select i1 %cmp, i7 -1, i7 %ctlz
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store i7 %sel, i7 addrspace(1)* %out
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ret void
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}
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