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a963b653dceba6717cdf29fddb3f67cd06201007
archived-llvm-mirror/test/CodeGen
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Matt Arsenault a963b653dc AMDGPU/GlobalISel: Select 16-bit VALU bit ops 
llvm-svn: 371807
2019-09-13 03:55:43 +00:00
..
AArch64
[AArch64][GlobalISel] Support tail calling with swiftself parameters
2019-09-12 23:00:59 +00:00
AMDGPU
AMDGPU/GlobalISel: Select 16-bit VALU bit ops
2019-09-13 03:55:43 +00:00
ARC
…
ARM
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
AVR
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BPF
[BPF] Fix bpf llvm-objdump issues.
2019-08-17 22:12:00 +00:00
Generic
Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""
2019-09-10 10:39:09 +00:00
Hexagon
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Inputs
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Lanai
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Mips
[MIPS GlobalISel] Select indirect branch
2019-09-12 11:44:36 +00:00
MIR
[PowerPC][MCP][NFC] Pre-commit test cases for https://reviews.llvm.org/D65267
2019-09-12 09:00:44 +00:00
MSP430
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NVPTX
[NVPTX] Fix PR41651
2019-07-30 19:52:01 +00:00
PowerPC
[PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class.
2019-09-12 22:07:35 +00:00
RISCV
[RISCV] Support stack offset exceed 32-bit for RV64
2019-09-13 02:50:13 +00:00
SPARC
[test] Fix tests when run on windows after SVN r369426. NFC.
2019-08-20 20:58:02 +00:00
SystemZ
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Thumb
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Thumb2
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
WebAssembly
[WebAssembly] Compare functions by names in Emscripten Sjlj
2019-09-03 22:26:49 +00:00
WinCFGuard
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WinEH
[Windows] Replace TrapUnreachable with an int3 insertion pass
2019-09-09 23:04:25 +00:00
X86
[Test] Restructure check lines to show differences between modes more clearly
2019-09-12 23:22:37 +00:00
XCore
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