6 Commits

Author SHA1 Message Date
Derek Schuff
e8d6789f06 [WebAssembly] Implement prolog/epilog insertion and FrameIndex elimination
Summary:
Use the SP32 physical register as the base for FrameIndex
lowering. Update it and the __stack_pointer global var in the prolog and
epilog. Extend the mapping of virtual registers to wasm locals to
include the physical registers.

Rather than modify the target-independent PrologEpilogInserter (which
asserts that there are no virtual registers left) include a
slightly-modified copy for Wasm that does not have this assertion and
only clears the virtual registers if scavenging was needed (which of
course it isn't for wasm).

Differential Revision: http://reviews.llvm.org/D15344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255392 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-11 23:49:46 +00:00
Dan Gohman
5b3101aa98 [WebAssembly] Fix WebAssemblyPeephole to set Changed to true when making changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255252 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:16:34 +00:00
Dan Gohman
9e8e46050a [WebAssembly] Declare that WebAssemblyPeephole does not modify the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255251 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-10 14:12:04 +00:00
Dan Gohman
8893466777 [WebAssembly] Implement ReverseBranchCondition, and re-enable MachineBlockPlacement
This patch introduces a codegen-only instruction currently named br_unless,
which makes it convenient to implement ReverseBranchCondition and re-enable
the MachineBlockPlacement pass. Then in a late pass, it lowers br_unless
back into br_if.

Differential Revision: http://reviews.llvm.org/D14995


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254826 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-05 03:03:35 +00:00
Dan Gohman
2aff4b612e [WebAssembly] Fix WebAssembly register numbering for registers added late.
If virtual registers are created late, mappings to WebAssembly
registers need to be added explicitly. This patch adds a function
to do so and teaches WebAssemblyPeephole to use it. This fixes
an out-of-bounds access on the WARegs vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254094 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 21:13:02 +00:00
Dan Gohman
dcdd1c138c [WebAssembly] Support for register stackifying with load and store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254076 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-25 16:55:01 +00:00