81 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov
63dcaeaca4 AMDGPU: Fix set but not used warnings related to AMDGPUAS
Differential Revision: https://reviews.llvm.org/D39499


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317114 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 19:12:38 +00:00
Benjamin Kramer
63e6891819 [AMDGPU] Clean up symbols in the global namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317051 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-31 23:21:30 +00:00
Konstantin Zhuravlyov
473d951406 AMDGPU: Do not emit deprecated notes for code object v3
Differential Revision: https://reviews.llvm.org/D38749


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315810 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14 15:59:07 +00:00
Konstantin Zhuravlyov
eb211af057 AMDGPU: Add support for isa version note
- Emit NT_AMD_AMDGPU_ISA
  - Add assembler parsing for isa version directive
    - If isa version directive does not match command line arguments, then return error

Differential Revision: https://reviews.llvm.org/D38748


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315808 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14 15:40:33 +00:00
Tim Renouf
8ba98f908f [AMDGPU] calling conventions for AMDPAL OS type
Summary:
This commit adds comments on how the AMDPAL OS type overloads the
existing AMDGPU_ calling conventions used by Mesa, and adds a couple of
new ones.

Reviewers: arsenm, nhaehnle, dstuttard

Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D37752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314502 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-29 09:51:22 +00:00
Eugene Zelenko
75134ec482 [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310541 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 00:46:15 +00:00
Matt Arsenault
2e48864110 AMDGPU: Cleanup subtarget features
Try to avoid mutually exclusive features. Don't use
a real default GPU, and use a fake "generic". The goal
is to make it easier to see which set of features are
incompatible between feature strings.

Most of the test changes are due to random scheduling changes
from not having a default fullspeed model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310258 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 14:58:04 +00:00
Matt Arsenault
b485eb2278 AMDGPU: Fix using SMRD instructions for argument loads in functions
These are not actually uniform values except in kernels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309172 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-26 20:39:42 +00:00
Dmitry Preobrazhensky
38b7ee369e [AMDGPU][MC] Optimized IsRegIntersect function
Optimized IsRegIntersect by using MCRegAliasIterator

See Bug 33800: https://bugs.llvm.org//show_bug.cgi?id=33800

Reviewers: arsenm, artem.tamazov

Differential Revision: https://reviews.llvm.org/D35452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308294 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-18 11:14:02 +00:00
Konstantin Zhuravlyov
2e2081eea2 Revert "AMDGPU: Do not test for SI in getIsaVersion"
This reverts commit r307573.

This breaks downstream test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307678 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 17:57:41 +00:00
Konstantin Zhuravlyov
f392c1f922 AMDGPU: Do not test for SI in getIsaVersion
SI is being tested by isa version in the first two if statements of the function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307573 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-10 19:24:05 +00:00
Dmitry Preobrazhensky
a03e7679c5 [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src
See Bug 33279: https://bugs.llvm.org//show_bug.cgi?id=33279

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D34003

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305915 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 14:41:34 +00:00
Wei Ding
2d0aa2e9ba AMDGPU : Fix ISA Version Definitions.
Differential Revision: http://reviews.llvm.org/D28531

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305137 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-10 03:53:19 +00:00
Zachary Turner
19ca2b0f9d Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304864 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 03:48:56 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Konstantin Zhuravlyov
2b704b0e54 AMDGPU: Remove deprecated and unused elf definitions
Differential Revision: https://reviews.llvm.org/D33689


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304737 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 21:33:40 +00:00
Dmitry Preobrazhensky
4a31d77be2 [AMDGPU][MC] New syntax for ds_swizzle_b32 offset
See Bug 28601: https://bugs.llvm.org//show_bug.cgi?id=28601

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D33542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304309 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-31 16:26:47 +00:00
Marek Olsak
0a21c3c299 Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
This reverts commit e065977c4b.

It doesn't work. S_LOAD_DWORD_IMM_ci and friends aren't selected by any of
the patterns, so it was putting 32-bit literals into the 8-bit field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303754 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 14:53:50 +00:00
Marek Olsak
e065977c4b AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns
This is just a cleanup. Also, it adds checking that ByteCount is aligned to 4.

Reviewers: arsenm, nhaehnle, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28994

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303658 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 17:14:34 +00:00
Sam Kolton
4abd85d7e5 [AMDGPU] SDWA: Add assembler support for GFX9
Summary:
Added separate pseudo and real instruction for GFX9 SDWA instructions.
Currently supports only in assembler.
Depends D32493

Reviewers: vpykhtin, artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D33132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303620 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 10:08:55 +00:00
Matt Arsenault
a0540d3468 AMDGPU: Start defining a calling convention
Partially implement callee-side for arguments and return values.
byval doesn't work properly, and most likely sret or other on-stack
return values most as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303308 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-17 21:56:25 +00:00
Marek Olsak
a2057043bd AMDGPU: Add AMDGPU_HS calling convention
Reviewers: arsenm, nhaehnle

Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D32644

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301930 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-02 15:41:10 +00:00
Konstantin Zhuravlyov
8c373cc5e6 AMDGPU: Temporarily disable packed inlinable literals (v2f16, v2i16)
Differential Revision: https://reviews.llvm.org/D32361


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-21 19:45:22 +00:00
Matt Arsenault
56db90276b AMDGPU: Refactor SIMachineFunctionInfo slightly
Prepare for handling non-entry functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299999 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-11 22:29:28 +00:00
Matt Arsenault
938bfaf893 AMDGPU: Refactor argument lowering
Split into smaller functions and prepare for handling
non-entry functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-11 22:29:24 +00:00
Matt Arsenault
40cf5b3d29 AMDGPU: Fix crash when disassembling VOP3 mac
The unused dummy src2_modifiers is missing, so it crashes
when trying to print it.

I tried to fully remove src2_modifiers, but there are some
irritations in the places where it is converted to mad since
it starts to require modifying use lists while iterating over
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299861 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-10 17:58:06 +00:00
Yaxun Liu
e4f931e960 [AMDGPU] Temporarily change constant address space from 4 to 2
Our final address space mapping is to let constant address space to be 4 to match nvptx.
However for now we will make it 2 to avoid unnecessary work in FE/BE/devlib
about intrinsics returning constant pointers.

Differential Revision: https://reviews.llvm.org/D31770


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299690 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-06 19:17:32 +00:00
Yaxun Liu
ab3be33d40 [AMDGPU] Get address space mapping by target triple environment
As we introduced target triple environment amdgiz and amdgizcl, the address
space values are no longer enums. We have to decide the value by target triple.

The basic idea is to use struct AMDGPUAS to represent address space values.
For address space values which are not depend on target triple, use static
const members, so that they don't occupy extra memory space and is equivalent
to a compile time constant.

Since the struct is lightweight and cheap, it can be created on the fly at
the point of usage. Or it can be added as member to a pass and created at
the beginning of the run* function.

Differential Revision: https://reviews.llvm.org/D31284


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298846 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 14:04:01 +00:00
Dmitry Preobrazhensky
23bacbc32a [AMDGPU][MC] Fix for Bug 30829 + LIT tests
Added code to check constant bus restrictions for VOP formats (only one SGPR value or literal-constant may be used by the instruction).
Note that the same checks are performed by SIInstrInfo::verifyInstruction (used by lowering code).
Added LIT tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296873 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 14:31:06 +00:00
Konstantin Zhuravlyov
b1d063dce5 [AMDGPU] Change amd_kernel_code_t's minor version to 1
- We do emit amd_kernel_code_t v1.1

Differential Revision: https://reviews.llvm.org/D30433


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296489 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 17:17:52 +00:00
Matt Arsenault
87fd70245a AMDGPU: Add VOP3P instruction format
Add a few non-VOP3P but instructions related to packed.

Includes hack with dummy operands for the benefit of the assembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-27 18:49:11 +00:00
Matt Arsenault
83c857cd3a AMDGPU: Merge initial gfx9 support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295554 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-18 18:29:53 +00:00
Stanislav Mekhanoshin
237ec36765 [AMDGPU] Fix MaxWorkGroupsPerCU for large workgroups
This patch corrects the maximum workgroups per CU if we have big
workgroups (more than 128). This calculation contributes to the
occupancy calculation in respect to LDS size.

Differential Revision: https://reviews.llvm.org/D29974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295134 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-15 01:03:59 +00:00
Eugene Zelenko
7211c537b1 [MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
Same changes in files affected by reduced MC headers dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-14 00:33:36 +00:00
Wei Ding
c75c94d0eb AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294692 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 02:15:29 +00:00
Konstantin Zhuravlyov
6270090e5c [AMDGPU] Calculate number of min/max SGPRs/VGPRs for WavesPerEU instead of using switch statement
Differential Revision: https://reviews.llvm.org/D29741


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294627 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 21:33:23 +00:00
Konstantin Zhuravlyov
017228cd76 [AMDGPU] Add target information that is required by tools to metadata
Differential Revision: https://reviews.llvm.org/D28760#fb670e28


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294449 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 14:05:23 +00:00
Artem Tamazov
70e6a6c2ce [AMDGPU][mc] Fix AddressSanitizer leftover issue in gfx7_asm_all test
Issue occurs when assembling "ds_ordered_count v0, v0 gds".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 12:47:30 +00:00
Tom Stellard
f7f8a35213 Re-commit AMDGPU/GlobalISel: Add support for simple shaders
Fix build when global-isel is disabled and fix a warning.

Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293551 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 21:56:46 +00:00
Tom Stellard
78e51c03b5 Revert "AMDGPU/GlobalISel: Add support for simple shaders"
This reverts commit r293503.

Revert while I investigate some of the buildbot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293509 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:42:41 +00:00
Tom Stellard
945c85d877 AMDGPU/GlobalISel: Add support for simple shaders
Summary: We can select constant/global G_LOAD, global G_STORE, and G_GEP.

Reviewers: qcolombet, MatzeB, t.p.northover, ab, arsenm

Subscribers: mehdi_amini, vkalintiris, kzhuravl, wdng, nhaehnle, mgorny, yaxunl, tony-tye, modocache, llvm-commits, dberris

Differential Revision: https://reviews.llvm.org/D26730

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 17:09:15 +00:00
Artem Tamazov
45120444da [AMDGPU][mc] Fix memory corruption uncovered by AddressSanitizer during coverage/smoke Gfx7/8 testing.
Coverage/smoke Gfx7/8 tests were committed r292922 but then reverted
by r292974 due to AddressSanitizer failure, which is fixed by this patch.
Tests to be re-committed soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-27 22:19:42 +00:00
Tom Stellard
1f91c2f5d6 AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D29068

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293321 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-27 18:41:14 +00:00
Matt Arsenault
d1c6dad551 AMDGPU: Set call_convention bit in kernel_code_t
According to the documentation this is supposed to be -1
if indirect calls are not supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293081 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-25 20:21:57 +00:00
Sam Kolton
9298246497 [AMDGPU] Assembler: fix v_mac_f16 immediates
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 15:26:02 +00:00
Konstantin Zhuravlyov
f6f52a315e [AMDGPU] Remove extra semicolon. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291246 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-06 17:23:21 +00:00
Matt Arsenault
8d631491b3 AMDGPU: Fix handling of 16-bit immediates
Since 32-bit instructions with 32-bit input immediate behavior
are used to materialize 16-bit constants in 32-bit registers
for 16-bit instructions, determining the legality based
on the size is incorrect. Change operands to have the size
specified in the type.

Also adds a workaround for a disassembler bug that
produces an immediate MCOperand for an operand that
is supposed to be OPERAND_REGISTER.

The assembler appears to accept out of bounds immediates and
truncates them, but this seems to be an issue for 32-bit
already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289306 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-10 00:39:12 +00:00
Matt Arsenault
792cdf8f92 AMDGPU: Consolidate inline immediate predicate functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288718 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 22:26:17 +00:00
Tom Stellard
5480a2423d AMDGPU/SI: Handle hazard with > 8 byte VMEM stores
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25577

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285359 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 23:05:31 +00:00
Yaxun Liu
c93e472923 AMDGPU: Refactor processor definition to use ISA version features
Add missing ISA versions 7.0.2/8.0.4/8.1.0. to backend.

Refactor processor definition to use ISA version features.

Fixed ISA version for stoney.

Based on Laurent Morichetti's patch.

Differential Revision: https://reviews.llvm.org/D25919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285210 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-26 16:37:56 +00:00