18 Commits

Author SHA1 Message Date
Dylan McKay
c35197f6ec [AVR] Prefer BasicBlock::getIterator over Function::begin()
Thanks to Eli Friedman for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314182 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-26 01:37:53 +00:00
Dylan McKay
fca6e8be46 [AVR] When lowering shifts into loops, put newly generated MBBs in the same
spot as the original MBB

Discovered in avr-rust/rust#62
https://github.com/avr-rust/rust/issues/62

Patch by Gergo Erdi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314180 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-26 00:51:03 +00:00
Jonas Paulsson
ed69aeeaad [SystemZ, LoopStrengthReduce]
This patch makes LSR generate better code for SystemZ in the cases of memory
intrinsics, Load->Store pairs or comparison of immediate with memory.

In order to achieve this, the following common code changes were made:

 * New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if
 LSR should do instruction-based addressing evaluations by calling
 isLegalAddressingMode() with the Instruction pointers.
 * In LoopStrengthReduce: handle address operands of memset, memmove and memcpy
 as address uses, and call isFoldableMemAccessOffset() for any LSRUse::Address,
 not just loads or stores.

SystemZ changes:

 * isLSRCostLess() implemented with Insns first, and without ImmCost.
 * New function supportedAddressingMode() that is a helper for TTI methods
 looking at Instructions passed via pointers.

Review: Ulrich Weigand, Quentin Colombet
https://reviews.llvm.org/D35262
https://reviews.llvm.org/D35049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308729 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-21 11:59:37 +00:00
Dylan McKay
b40677abb7 [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
When generating code for a shift loop, check the shift
 amount against the literal value 0, not R0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304284 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-31 06:27:46 +00:00
Dylan McKay
af4bf77761 [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot
Contributed by Dr. Gergő Érdi.

Fixes a bug.

Raised from (https://github.com/avr-rust/rust/issues/49).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302973 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-13 00:22:34 +00:00
Leslie Zhai
6920a456bc [AVR] Migrate to new StructType::get owing to Supress all uses of LLVM_END_WITH_NULL
Reviewers: dylanmckay, jroelofs, RKSimon, serge-sans-paille

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D33119


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302885 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-12 09:08:03 +00:00
Serge Pavlov
1f4a80fdc1 Add extra operand to CALLSEQ_START to keep frame part set up previously
Using arguments with attribute inalloca creates problems for verification
of machine representation. This attribute instructs the backend that the
argument is prepared in stack prior to  CALLSEQ_START..CALLSEQ_END
sequence (see http://llvm.org/docs/InAlloca.htm for details). Frame size
stored in CALLSEQ_START in this case does not count the size of this
argument. However CALLSEQ_END still keeps total frame size, as caller can
be responsible for cleanup of entire frame. So CALLSEQ_START and
CALLSEQ_END keep different frame size and the difference is treated by
MachineVerifier as stack error. Currently there is no way to distinguish
this case from actual errors.

This patch adds additional argument to CALLSEQ_START and its
target-specific counterparts to keep size of stack that is set up prior to
the call frame sequence. This argument allows MachineVerifier to calculate
actual frame size associated with frame setup instruction and correctly
process the case of inalloca arguments.

The changes made by the patch are:
- Frame setup instructions get the second mandatory argument. It
  affects all targets that use frame pseudo instructions and touched many
  files although the changes are uniform.
- Access to frame properties are implemented using special instructions
  rather than calls getOperand(N).getImm(). For X86 and ARM such
  replacement was made previously.
- Changes that reflect appearance of additional argument of frame setup
  instruction. These involve proper instruction initialization and
  methods that access instruction arguments.
- MachineVerifier retrieves frame size using method, which reports sum of
  frame parts initialized inside frame instruction pair and outside it.

The patch implements approach proposed by Quentin Colombet in
https://bugs.llvm.org/show_bug.cgi?id=27481#c1.
It fixes 9 tests failed with machine verifier enabled and listed
in PR27481.

Differential Revision: https://reviews.llvm.org/D32394


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302527 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-09 13:35:13 +00:00
Dylan McKay
02f82baedd [AVR] Implement non-constant bit rotations
This lets us do bit rotations of variable amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301794 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-01 09:48:55 +00:00
Meador Inge
39c17c7b89 [AVR] Fix build after r298178
r298178 capitalized the fields in `ArgListEntry`.  All the official
targets were updated accordingly, but as an experimental target AVR
was missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298677 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-24 01:57:29 +00:00
Reid Kleckner
6707770d48 Rename AttributeSet to AttributeList
Summary:
This class is a list of AttributeSetNodes corresponding the function
prototype of a call or function declaration. This class used to be
called ParamAttrListPtr, then AttrListPtr, then AttributeSet. It is
typically accessed by parameter and return value index, so
"AttributeList" seems like a more intuitive name.

Rename AttributeSetImpl to AttributeListImpl to follow suit.

It's useful to rename this class so that we can rename AttributeSetNode
to AttributeSet later. AttributeSet is the set of attributes that apply
to a single function, argument, or return value.

Reviewers: sanjoy, javed.absar, chandlerc, pete

Reviewed By: pete

Subscribers: pete, jholewinski, arsenm, dschuff, mehdi_amini, jfb, nhaehnle, sbc100, void, llvm-commits

Differential Revision: https://reviews.llvm.org/D31102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298393 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:57:19 +00:00
Nirav Dave
11fdc7845a Make library calls sensitive to regparm module flag (Fixes PR3997).
Reviewers: mkuper, rnk

Subscribers: mehdi_amini, jyknight, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D27050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-18 00:44:07 +00:00
Dylan McKay
92f59a0260 [AVR] Implement stacksave/stackrestore by expanding (PR31342)
Summary:
Authored by Florian Zeitz.

This implements the missing stacksave/stackrestore intrinsics via expansion.

Output of `llc -O0 -march=avr ~/devel/llvm/test/CodeGen/Generic/stacksave-restore.ll` for sanity checking (comments mine):

```
	.text
	.file	".../llvm/test/CodeGen/Generic/stacksave-restore.ll"
	.globl	test
	.p2align	1
	.type	test,@function
test:                                   ; @test
; BB#0:
	push	r28
	push	r29

	in	r28, 61
	in	r29, 62
	sbiw	r28, 4
	in	r0, 63
	cli
	out	62, r29
	out	63, r0
	out	61, r28

	in	r18, 61
	in	r19, 62

	mov	r20, r22
	mov	r21, r23

	in	r30, 61
	in	r31, 62

	lsl	r22
	rol	r23
	lsl	r22
	rol	r23
	in	r26, 61
	in	r27, 62
	sub	r26, r22
	sbc	r27, r23
	andi	r26, 252
	in	r0, 63
	cli
	out	62, r27
	out	63, r0
	out	61, r26

	in	r0, 63
	cli
	out	62, r31
	out	63, r0
	out	61, r30

	in	r30, 61
	in	r31, 62
	sub	r30, r22
	sbc	r31, r23
	andi	r30, 252
	in	r0, 63
	cli
	out	62, r31
	out	63, r0
	out	61, r30

	std	Y+3, r24                ; 2-byte Folded Spill
	std	Y+4, r25                ; 2-byte Folded Spill

	mov	r24, r26
	mov	r25, r27

	in	r0, 63
	cli
	out	62, r19
	out	63, r0
	out	61, r18

	std	Y+1, r20                ; 2-byte Folded Spill
	std	Y+2, r21                ; 2-byte Folded Spill

	adiw	r28, 4
	in	r0, 63
	cli
	out	62, r29
	out	63, r0
	out	61, r28

	pop	r29
	pop	r28
	ret
.Lfunc_end0:
	.size	test, .Lfunc_end0-test
```

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29553

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294146 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-05 21:35:45 +00:00
Dylan McKay
10348c4bad [AVR] Support zero-sized arguments in defined methods
It is sufficient to skip emission of these arguments as we have nothing
to actually pass through the function call.

The AVR-GCC reference has nothing to say about zero-sized arguments,
presumably because C/C++ doesn't support them. This means we don't have
to worry about ABI differences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294119 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-05 09:53:45 +00:00
Dylan McKay
ae27a7ca66 [AVR] Implement TargetLoweing::getRegisterByName
This allows the use of the 'read_register' intrinsics used by clang's
named register globals features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291375 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 23:39:47 +00:00
Dylan McKay
038449d896 [AVR] Expand 'SELECT_CC' nodes whereever possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288905 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-07 12:34:47 +00:00
Dylan McKay
0586c7bf63 [AVR] Add instruction selection lowering code
Summary: This adds AVRISelLowering.cpp

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, modocache, japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25034

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285790 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-02 06:47:40 +00:00
Dylan McKay
22a65ba593 Revert "[AVR] Add instruction selection lowering code"
I accidentally comitted it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282712 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-29 12:49:18 +00:00
Dylan McKay
da4f4c9f4f [AVR] Add instruction selection lowering code
Summary: This adds AVRISelLowering.cpp

Reviewers: kparzysz, arsenm

Subscribers: wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25034

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282711 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-29 12:44:38 +00:00