2 Commits

Author SHA1 Message Date
Ulrich Weigand
8ab242ce95 [SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor.  This part includes:
- Basic support for the new processor and its features.
- Support for new instructions (except vector 32-bit float and 128-bit float).
- CodeGen for new instructions, including new LLVM intrinsics.
- Scheduler description for the new processor.
- Detection of z14 as host processor.

Support for the new 32-bit vector float and 128-bit vector float
instructions is provided by separate patches.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308194 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-17 17:41:11 +00:00
Ulrich Weigand
75d5833bd6 [SystemZ] Add all remaining instructions
This adds all remaining instructions that were still missing, mostly
privileged and semi-privileged system-level instructions.  These are
provided for use with the assembler and disassembler only.

This brings the LLVM assembler / disassembler to parity with the
GNU binutils tools.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306876 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-30 20:43:40 +00:00