2 Commits

Author	SHA1	Message	Date
Simon Dardis	2788c957a5	[mips] Correct the instruction predicates for microMIPSr3 ... Rather than using the AdditionalPredicates mechanism to guard the microMIPS instructions, use the existing predicates to properly guard those instructions. This also resolves a case where an instruction pattern was incorrectly available for microMIPS32R6, which caused a register allocation failure as the registers specified in the pattern were not available. Reviewers: nitesh.jain, atanasyan Differential Revision: https://reviews.llvm.org/D38451 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315362 91177308-0d34-0410-b5e6-96231b3b80d8	2017-10-10 20:52:53 +00:00
Petar Jovanovic	8679b1f292	[mips] Generate NMADD and NMSUB instructions when fneg node is present ... This patch enables generation of NMADD and NMSUB instructions when fneg node is present. These instructions are currently only generated if fsub node is present. Patch by Stanislav Ocovaj. Differential Revision: https://reviews.llvm.org/D34507 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311862 91177308-0d34-0410-b5e6-96231b3b80d8	2017-08-27 21:07:24 +00:00