Commit Graph

5621 Commits

Author SHA1 Message Date
Manman Ren
d9e9e2b717 Swift Calling Convention: add swiftself attribute.
Differential Revision: http://reviews.llvm.org/D17866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264754 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-29 17:37:21 +00:00
Derek Schuff
1874067406 Move use of scoped enum in MachineFunctionProperties after its declaration
This should fix the build with MSVC 2013

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264668 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-28 21:38:35 +00:00
Derek Schuff
fadd113c9b Introduce MachineFunctionProperties and the AllVRegsAllocated property
MachineFunctionProperties represents a set of properties that a MachineFunction
can have at particular points in time. Existing examples of this idea are
MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which
will eventually be switched to use this mechanism.
This change introduces the AllVRegsAllocated property; i.e. the property that
all virtual registers have been allocated and there are no VReg operands
left.

With this mechanism, passes can declare that they require a particular property
to be set, or that they set or clear properties by implementing e.g.
MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class
verifies that the requirements are met, and handles the setting and clearing
based on the delcarations. Passes can also directly query and update the current
properties of the MF if they want to have conditional behavior.

This change annotates the target-independent post-regalloc passes; future
changes will also annotate target-specific ones.

Reviewers: qcolombet, hfinkel

Differential Revision: http://reviews.llvm.org/D18421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264593 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-28 17:05:30 +00:00
Justin Bogner
cd6820bba1 SelectionDAG: Remove arbitrary and bug-prone complexity from SDLoc
The implementation of SDLoc has an extra layer of indirection here for
no particular reason, and was leading to problems where we were
dereferencing pointers to SDNodes that had already been deleted so
that we could get at the DebugLoc for a new SDNode. This is one of the
errors that came up often in PR26808.

Instead, we can just track the DebugLoc and IROrder directly. This
makes the code both easier to understand and more correct. It's also
basically NFC other than fixing a large number of places where we were
reading the memory of deleted SDNodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264470 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-25 22:12:41 +00:00
Nirav Dave
a9f320779b Prevent construction of cycle in DAG store merge
When merging stores in DAGCombiner, add check to ensure that no
dependenices exist that would cause the construction of a cycle in our
DAG.  This may happen if one store has a data dependence on another
instruction (e.g. a load) which itself has a (chain) dependence on
another store being merged. These stores cannot be merged safely and
doing so results in a cycle that is discovered in LegalizeDAG.

This test is only done in cases where Antialias analysis is used (UseAA)
as non-AA store merge candidates will be merged logically after all
loads which have been checked to not alias.

Reviewers: ahatanak, spatel, niravd, arsenm, hfinkel, tstellarAMD, jyknight

Subscribers: llvm-commits, tberghammer, danalbert, srhines

Differential Revision: http://reviews.llvm.org/D18336

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264461 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-25 21:06:30 +00:00
Matt Arsenault
e4e369ab90 TTI: Report 0 cost for free addrspacecasts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264369 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-25 00:26:29 +00:00
Matt Arsenault
93e0b28a0e TTI: Use 0 for cost of fabs if free
Ideally this would also happen for fneg, but that
isn't a distinct operation in the IR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264368 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-25 00:26:22 +00:00
Sanjoy Das
8ba5ebc098 Add lowering support for llvm.experimental.deoptimize
Summary:
Only adds support for "naked" calls to llvm.experimental.deoptimize.
Support for round-tripping through RewriteStatepointsForGC will come
as a separate patch (should be simpler than this one).

Reviewers: reames

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264329 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-24 20:23:29 +00:00
Sanjoy Das
2080172098 [Statepoints] Fix yet another issue around gc pointer uniqueing
Given that StatepointLowering now uniques derived pointers before
putting them in the per-statepoint spill map, we may end up with missing
entries for derived pointers when we visit a gc.relocate on a pointer
that was de-duplicated away.

Fix this by keeping two maps, one mapping gc pointers to their
de-duplicated values, and one mapping a de-duplicated value to the slot
it is spilled in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264320 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-24 18:57:39 +00:00
Sanjoy Das
7bf7b9ce00 Minor cosmestic changes (NFC)
- Reflow comments
 - Rename function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264319 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-24 18:57:31 +00:00
Krzysztof Parzyszek
9da51d78c8 Fix some typos; NFC
Patch by Dongyuan Liu.

Differential Revision: http://reviews.llvm.org/D17977



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263786 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-18 14:08:42 +00:00
James Y Knight
ceb61bf42f Tweak some atomics functions in preparation for larger changes; NFC.
- Rename getATOMIC to getSYNC, as llvm will soon be able to emit both
  '__sync' libcalls and '__atomic' libcalls, and this function is for
  the '__sync' ones.

- getInsertFencesForAtomic() has been replaced with
  shouldInsertFencesForAtomic(Instruction), so that the decision can be
  made per-instruction. This functionality will be used soon.

- emitLeadingFence/emitTrailingFence are no longer called if
  shouldInsertFencesForAtomic returns false, and thus don't need to
  check the condition themselves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263665 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-16 22:12:04 +00:00
Quentin Colombet
36053724e3 [IRTranslator] Translate unconditional branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263265 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:28:03 +00:00
Quentin Colombet
a801132f2a [MachineIRBuilder] Rework buildInstr API to maximize code reuse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263264 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:27:58 +00:00
Quentin Colombet
acd8367766 [IRTranslator] Update getOrCreateVReg API to use references.
A value that we want to keep in a virtual register cannot be null.
Reflect that in the API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263263 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:27:54 +00:00
Quentin Colombet
743ea3e236 [MachineIRBuilder] Rename the setter of MF for consistency with the getter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263262 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:27:51 +00:00
Quentin Colombet
b62ecc87ce [MachineIRBuilder] Rename the setter for MBB for consistency with the getter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263261 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:27:47 +00:00
Quentin Colombet
3cf9237ecf [IRTranslator] Update getOrCreateBB API to use references.
A null basic block is invalid, so just pass a reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263260 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 17:27:43 +00:00
Matthias Braun
945faa1355 MachineRegisterInfo: Correct comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263046 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 18:47:05 +00:00
Richard Trieu
a3c641f033 Fix uninitialized member bool. Detected by ASan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262999 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 06:31:25 +00:00
Sanjay Patel
50c79efd00 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262961 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 21:41:13 +00:00
Manuel Klimek
8b37c12900 Fix problem with uninitilialized bool found by asan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262934 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 16:17:48 +00:00
Krzysztof Parzyszek
965326494a Add DAG mutation interface to the DFA packetizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262930 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 15:33:51 +00:00
Justin Bogner
a36efde3c8 SelectionDAG: Appease the bots that don't like my union
Should fix the breakage in r262902.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262908 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:51:58 +00:00
Justin Bogner
6fc18536b7 Re-apply "SelectionDAG: Store SDNode operands in an ArrayRecycler"
This re-applies r262886 with a fix for 32 bit platforms that have 8 byte
pointer alignment, effectively reverting r262892.

Original Message:

  Currently some SDNode operands are malloc'd, some are stored inline in
  subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
  This scheme is complex, inconsistent, and makes refactoring SDNodes
  fairly difficult.

  Instead, we can allocate all of the operands using an ArrayRecycler
  that wraps a BumpPtrAllocator. This keeps the cache locality when
  iterating operands, improves locality when iterating SDNodes without
  looking at operands, and vastly simplifies the ownership semantics.

  It also means we stop overallocating SDNodes by 2-3x and will make it
  simpler to fix the rampant undefined behaviour we have in how we
  mutate SDNodes from one kind to another (See llvm.org/pr26808).

  This is NFC other than the changes in memory behaviour, and I ran some
  LNT tests to make sure this didn't hurt compile time. Not many tests
  changed: there were a couple of 1-2% regressions reported, but there
  were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262902 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:14:29 +00:00
Justin Bogner
2a7cc3e509 Revert "SelectionDAG: Store SDNode operands in an ArrayRecycler"
Looks like the largest SDNode is different between 32 and 64 bit now,
so this is breaking 32 bit bots. Reverting while I figure out a fix.

This reverts r262886.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262892 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 01:07:03 +00:00
Justin Bogner
54124b63dc SelectionDAG: Store SDNode operands in an ArrayRecycler
Currently some SDNode operands are malloc'd, some are stored inline in
subclasses of SDNode, and some are thrown into a BumpPtrAllocator.
This scheme is complex, inconsistent, and makes refactoring SDNodes
fairly difficult.

Instead, we can allocate all of the operands using an ArrayRecycler
that wraps a BumpPtrAllocator. This keeps the cache locality when
iterating operands, improves locality when iterating SDNodes without
looking at operands, and vastly simplifies the ownership semantics.

It also means we stop overallocating SDNodes by 2-3x and will make it
simpler to fix the rampant undefined behaviour we have in how we
mutate SDNodes from one kind to another (See llvm.org/pr26808).

This is NFC other than the changes in memory behaviour, and I ran some
LNT tests to make sure this didn't hurt compile time. Not many tests
changed: there were a couple of 1-2% regressions reported, but there
were more improvements (of up to 4%) than regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 00:39:51 +00:00
Quentin Colombet
c101677635 [MachineInstr] Get rid of some GlobalISel ifdefs.
Now the type API is always available, but when global-isel is not
built the implementation does nothing.

Note: The implementation free of ifdefs is WIP and tracked here in PR26576.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262873 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 22:47:23 +00:00
Quentin Colombet
16fea2ad9c [MachineRegisterInfo] Add a method to set the size of a virtual register a posteriori.
This is required for mir testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262861 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:41:39 +00:00
Quentin Colombet
76b5b59a75 [MachineRegisterInfo] Get rid of the global-isel ifdefs.
One additional pointer is not a big deal size-wise and it makes
the code much nicer!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262856 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 21:22:09 +00:00
Justin Bogner
091b46f643 SelectionDAG: Remove some unused AtomicSDNode constructors. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262849 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 20:15:12 +00:00
Craig Topper
4016ad20d2 [CodeGen] Add space-optimized EmitMergeInputChains1_2 to the DAG isel matching tables. Shaves about 5100 bytes from the X86 matcher table. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262815 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-07 07:29:12 +00:00
Krzysztof Parzyszek
0c79dd7f42 Add DAG mutation interface to the post-RA scheduler
Differential Revision: http://reviews.llvm.org/D17868


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262774 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-05 15:45:23 +00:00
Justin Bogner
aac07fb758 Annotate our undefined behaviour to sneak it past the sanitizers
We have known UB in some ilists where we static cast half nodes to
(larger) derived types and use the address. See llvm.org/PR26753.

This needs to be fixed, but in the meantime it'd be nice if running
ubsan didn't complain. This adds annotations in the two places where
ubsan complains while running check-all of a sanitized clang build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-04 01:52:47 +00:00
Justin Bogner
32bbef3355 CodeGen: Tune the SmallVector size in LiveRange
The vast majority of LiveRanges (ie, 4/5) have exactly 1 segment and 1
value number, and a good chunk of the rest have 2 of each, so
allocating space for 4 is wasteful. This is especially noticeable when
dealing with a very large number of vregs, and I have an internal case
where dropping this to 2 shaves over 5% off of peak memory when
compiling a particularly large function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262681 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-04 00:58:39 +00:00
Matt Arsenault
7ed98632b7 TTI: Fix not using overload of getIntrinsicInstrCost
This was always calling the generic version, so the target
custom implementation was never called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262585 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-03 05:43:49 +00:00
Justin Bogner
13724638d0 SelectionDAG: Use correctly sized allocation functions for SDNodes
The placement new calls here were all calling the allocation function
in RecyclingAllocator/Recycler for SDNode, instead of the function for
the specific subclass we were constructing.

Since this particular allocator always overallocates it more or less
worked, but would hide what we're actually doing from any memory
tools. Also, if you tried to change this allocator so something like a
BumpPtrAllocator or MallocAllocator, the compiler would crash horribly
all the time.

Part of llvm.org/PR26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262500 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 19:01:11 +00:00
Matt Arsenault
9a6db34754 Add isScalarInteger helper to EVT/MVT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262357 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 18:01:28 +00:00
Hans Wennborg
b4e63ec23a [X86] Check that attribute parameters match for tail calls (PR26590)
In the code below on 32-bit targets, x would previously get forwarded to g()
without sign-extension to 32 bits as required by the parameter attribute.

  void g(signed short);
  void f(unsigned short x) {
    g(x);
  }

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262352 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 17:45:23 +00:00
Duncan P. N. Exon Smith
5144d3546c CodeGen: Update LiveIntervalAnalysis API to use MachineInstr&, NFC
These parameters aren't expected to be null, so take them by reference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262151 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 20:14:29 +00:00
Duncan P. N. Exon Smith
1d75c8d9ec CodeGen: Change MachineInstr to use MachineInstr&, NFC
Change MachineInstr API to prefer MachineInstr& over MachineInstr*
whenever the parameter is expected to be non-null.  Slowly inching
toward being able to fix PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262149 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 20:01:33 +00:00
Duncan P. N. Exon Smith
0ce039da16 CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC
In all but one case, change the DFAPacketizer API to take MachineInstr&
instead of MachineInstr*.  In DFAPacketizer::endPacket(), take
MachineBasicBlock::iterator.  Besides cleaning up the API, this is in
search of PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262142 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 19:09:00 +00:00
Duncan P. N. Exon Smith
63ec7f0445 WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC
Update APIs in MachineInstrBundle.h to take and return MachineInstr&
instead of MachineInstr* when the instruction cannot be null.  Besides
being a nice cleanup, this is tacking toward a fix for PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262141 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 17:05:33 +00:00
Duncan P. N. Exon Smith
6667d85d09 CodeGen: Avoid implicit conversion in MachineInstrBuilder, NFC
Avoid another implicit conversion from MachineInstrBundleIterator to
MachineInstr*, this time in MachineInstrBuilder.h (this is in pursuit of
PR26753).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262118 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 07:00:35 +00:00
Duncan P. N. Exon Smith
e71d87d7c6 CodeGen: Remove implicit iterator to pointer conversions, NFC
Remove a couple of implicit conversions from MachineInstrBundleIterator
to MachineInstr*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262116 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 06:51:00 +00:00
Duncan P. N. Exon Smith
42e18357c5 CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
Take MachineInstr by reference instead of by pointer in SlotIndexes and
the SlotIndex wrappers in LiveIntervals.  The MachineInstrs here are
never null, so this cleans up the API a bit.  It also incidentally
removes a few implicit conversions from MachineInstrBundleIterator to
MachineInstr* (see PR26753).

At a couple of call sites it was convenient to convert to a range-based
for loop over MachineBasicBlock::instr_begin/instr_end, so I added
MachineBasicBlock::instrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262115 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 06:40:41 +00:00
Cong Hou
e4f9f1583a Detecte vector reduction operations just before instruction selection.
(This is the second attemp to commit this patch, after fixing pr26652 & pr26653).

This patch detects vector reductions before instruction selection. Vector
reductions are vectorized reduction operations, and for such operations we have
freedom to reorganize the elements of the result as long as the reduction of them
stay unchanged. This will enable some reduction pattern recognition during
instruction combine such as SAD/dot-product on X86. A flag is added to
SDNodeFlags to mark those vector reduction nodes to be checked during instruction
combine.

To detect those vector reductions, we search def-use chains starting from the
given instruction, and check if all uses fall into two categories:

1. Reduction with another vector.
2. Reduction on all elements.

in which 2 is detected by recognizing the pattern that the loop vectorizer
generates to reduce all elements in the vector outside of the loop, which
includes several ShuffleVector and one ExtractElement instructions.


Differential revision: http://reviews.llvm.org/D15250




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261804 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-24 23:40:36 +00:00
Matthias Braun
cd4f289b4e MachineInstr: Respect register aliases in clearRegiserKills()
This fixes bugs in copy elimination code in llvm. It slightly changes the
semantics of clearRegisterKills(). This is appropriate because:
- Users in lib/CodeGen/MachineCopyPropagation.cpp and
  lib/Target/AArch64RedundantCopyElimination.cpp and
  lib/Target/SystemZ/SystemZElimCompare.cpp are incorrect without it
  (see included testcase).
- All other users in llvm are unaffected (they pass TRI==nullptr)
- (Kill flags are optional anyway so removing too many shouldn't hurt.)

Differential Revision: http://reviews.llvm.org/D17554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261763 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-24 19:21:48 +00:00
Duncan P. N. Exon Smith
110284e56c CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
This is a little embarrassing.

When I reverted r261504 (getIterator() => getInstrIterator()) in
r261567, I did a `git grep` to see if there were new calls to
`getInstrIterator()` that I needed to migrate.  There were 10-20 hits,
and I blindly did a `sed ...` before calling `ninja check`.

However, these were `MachineInstrBundleIterator::getInstrIterator()`,
which predated r261567.  Perhaps coincidentally, these had an identical
name and return type.

This commit undoes my careless sed and restores
`MachineBasicBlock::iterator::getInstrIterator()`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261577 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:30:15 +00:00
Duncan P. N. Exon Smith
20a62528ef Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"
This reverts commit r261504, since it's not obvious the new name is
better:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html

I'll recommit if we get consensus that it's the right direction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261567 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:49:58 +00:00