Commit Graph

1303 Commits

Author SHA1 Message Date
Eli Friedman
19ce959014 [SCEV] Make getUDivExactExpr handle non-nuw multiplies correctly.
To avoid regressions, make ScalarEvolution::createSCEV a bit more
clever.

Also get rid of some useless code in ScalarEvolution::howFarToZero
which was hiding this bug.

No new testcase because it's impossible to actually expose this bug:
we don't have any in-tree users of getUDivExactExpr besides the two
functions I just mentioned, and they both dodged the problem. I'll
try to add some interesting users in a followup.

Differential Revision: https://reviews.llvm.org/D28587



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292449 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-18 23:56:42 +00:00
Chandler Carruth
1c28b57b8b [PM] Teach the LoopPassManager to automatically canonicalize loops by
runnig LCSSA over them prior to running the loop pipeline.

This also teaches the loop PM to verify that LCSSA form is preserved
throughout the pipeline's run across the loop nest.

Most of the test updates just leverage this new functionality. One has to be
relaxed with the new PM as IVUsers is less powerful when it sees LCSSA input.

Differential Revision: https://reviews.llvm.org/D28743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292241 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 19:18:12 +00:00
Simon Pilgrim
0016b62b09 [CostModel][X86] Fix AVX512BW vector shift costs for vXi16 types
We already have patterns in place to support 128/256-bit shifts without AVX512VL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292077 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-15 20:44:00 +00:00
Simon Pilgrim
3a60120921 [CostModel][X86] Drop separate AVX512VL checks - they match existing AVX512 costs
Keep the tests though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292076 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-15 20:19:28 +00:00
Simon Pilgrim
43b72e4d01 [CostModel][X86] Update vector shift tests to correctly check by non-constant uniform values.
Use shuffle( scslar_to_vector, zeroinitializer) pattern instead of shuffle( vec, zeroinitializer)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292075 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-15 20:10:28 +00:00
Chandler Carruth
0e327f2e11 [PM] Clean up the testing for IVUsers, especially with the new PM.
First, I've moved a test of IVUsers from the LSR tree to a dedicated
IVUsers test directory. I've also simplified its RUN line now that the
new pass manager's loop PM is providing analyses on their own.

No functionality changed, but it makes subsequent changes cleaner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-15 09:29:27 +00:00
Chandler Carruth
15050a4c1e [PM] The assumption cache is fundamentally designed to be self-updating,
mark it as never invalidated in the new PM.

The old PM already required this to work, and after a discussion with
Hal this seems to really be the only sensible answer. The cache
gracefully degrades as the IR is mutated, and most things which do this
should already be incrementally updating the cache.

This gets rid of a bunch of logic preserving and testing the
invalidation of this analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-15 00:26:18 +00:00
Simon Pilgrim
75f614f4c2 [CostModel][X86] Updated vXi64 ASHR costs on AVX512 targets now that D28604 has landed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 19:24:23 +00:00
Eli Friedman
1404fc08fc [SCEV] Make howFarToZero max backedge-taken count check for precondition.
Refines max backedge-taken count if a loop like
"for (int i = 0; i != n; ++i) { /* body */ }" is rotated.

Differential Revision: https://reviews.llvm.org/D28536



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291704 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 21:07:15 +00:00
Eli Friedman
08108a29e3 [SCEV] Make howFarToZero use a simpler formula for max backedge-taken count.
This is both easier to understand, and produces a tighter bound in certain
cases.

Differential Revision: https://reviews.llvm.org/D28393



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291701 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 20:55:48 +00:00
Simon Pilgrim
b237097a65 [X86][AVX512BW] Vectorize v64i8 vector shifts
Differential Revision: https://reviews.llvm.org/D28447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 10:36:51 +00:00
Simon Pilgrim
4f063324dc Fix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291663 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 10:25:31 +00:00
Mohammed Agabaria
9c6b24cc3a [X86] updating TTI costs for arithmetic instructions on X86\SLM arch.
updated instructions:
pmulld, pmullw, pmulhw, mulsd, mulps, mulpd, divss, divps, divsd, divpd, addpd and subpd.

special optimization case which replaces pmulld with pmullw\pmulhw\pshuf seq. 
In case if the real operands bitwidth <= 16.

Differential Revision: https://reviews.llvm.org/D28104 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291657 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 08:23:37 +00:00
Evandro Menezes
eb75eeae13 [AArch64] Consider all vector types for FeatureSlowMisaligned128Store
The original code considered only v2i64 as slow for this feature. This patch
consider all 128-bit long vector types as slow candidates.

In internal tests, extending this feature to all 128-bit vector types
resulted in an overall improvement of 1% on Exynos M1.

Differential revision: https://reviews.llvm.org/D27998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291616 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 23:42:21 +00:00
Simon Pilgrim
16ed161b13 [CostModel][X86] Add AVX512VL vector shift cost tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291585 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 19:04:12 +00:00
Sanjay Patel
edac66f29b [ValueTracking] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291468 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-09 19:31:20 +00:00
Chandler Carruth
f7babeb5d8 [PM] Teach SCEV to invalidate itself when its dependencies become
invalid.

This fixes use-after-free bugs that will arise with any interesting use
of SCEV.

I've added a dedicated test that works diligently to trigger these kinds
of bugs in the new pass manager and also checks for them explicitly as
well as triggering ASan failures when things go squirly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291426 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-09 07:44:34 +00:00
Simon Pilgrim
35f85cb068 [CostModel][X86] Fixed vXi8 uniform shift costs.
The 'fast' costs should only work for shifts by uniform constants (uniform non-constant are lowered using the slow default implementation).

Logical shifts were not taking into account that we must mask the psrlw result, so the costs needed to be doubled.

Added missing AVX2/AVX512BW costs as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291391 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-08 14:14:36 +00:00
Simon Pilgrim
93f6323c31 [CostModel][X86] Moved legal uniform shift costs earlier.
XOP was prematurely matching, doubling the cost of ashr/lshr uniform shifts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291390 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-08 13:12:03 +00:00
Simon Pilgrim
4f2c5010fd [CostModel][X86] Update SSE41/AVX1 vXi32 SHL costs
SSE41 provides pmulld which allows the simpler pslld/paddd/cvttps2dq/pmulld pattern than SSE2's use of pmuludq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291372 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 22:27:43 +00:00
Simon Pilgrim
ee6faf574a [CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291366 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 22:08:09 +00:00
Simon Pilgrim
371d289738 [CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and above
We were matching against general vector shift costs before the uniform splat costs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291365 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 21:47:10 +00:00
Simon Pilgrim
21886bd4a8 [CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291354 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 17:54:10 +00:00
Simon Pilgrim
f9fdf76b96 [X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffles (PR31470)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291347 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-07 15:37:50 +00:00
Simon Pilgrim
3beff6a4d1 [CostModel][X86] Add AVX512 and 512-bit vector shift cost tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291269 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-06 19:41:26 +00:00
Chad Rosier
ed5adf8510 [AArch64] Reduce vector insert/extract cost for Falkor.
Differential Revision: https://reviews.llvm.org/D28403

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291254 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-06 18:03:26 +00:00
Simon Pilgrim
e5088f5e84 [CostModel][X86] Fix 512-bit SDIV/UDIV 'big' costs.
Set the costs on the lowest target that supports the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291229 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-06 11:12:53 +00:00
Simon Pilgrim
4c61c4605a [CostModel][X86] Add SDIV/UDIV cost tests for a wider range of targets
Added a test demonstrating bug in AVX512 division costs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-06 11:02:40 +00:00
Simon Pilgrim
6c924280fe [CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL
Matches other MUL/ADD/SUB 256-bit case on AVX1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291149 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 18:20:25 +00:00
Chad Rosier
1c1849cdd8 [AArch64][CostModel] Add coverage for bswap intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291140 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 16:55:32 +00:00
Simon Pilgrim
2cf83fd91e [CostModel][X86] Add support for broadcast shuffle costs
Currently only for broadcasts with input and output of the same width.

Differential Revision: https://reviews.llvm.org/D27811

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291122 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 15:56:08 +00:00
Chad Rosier
213f249d8d [AArch64] Remove mcpu option as this test is not target specific. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 15:05:03 +00:00
Chad Rosier
c8deff8e27 [AArch64] Remove unused arguments from tests. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291112 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 14:48:53 +00:00
Tobias Grosser
b868610156 Add missing CHECK: line to test case added in 29097
Without this CHECK line, we may not detect incorrectly detected additional
regions at the end of the region tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-04 19:35:38 +00:00
Tobias Grosser
5f405a9704 RegionInfo: add new test case
This test case has been reduced from test/Analysis/RegionInfo/mix_1.ll and
provides us with a minimal example of a test case which caused problems while
working on an improved version of the RegionInfo analysis. We upstream this
test case, as it certainly can be helpful in future debugging and optimization
tests.

Test case reduced by Pratik Bhatu <cs12b1010@iith.ac.in>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290974 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-04 17:50:15 +00:00
Simon Pilgrim
19aab9f9fa [CostModel][X86] Updated vXi8 and vXi16 Reverse/Alternate shuffle costs
Actual codegen is much better than the extract+insert patterns that was assumed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290962 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-04 14:01:33 +00:00
Elena Demikhovsky
6c207672d9 Fixed shuffle-reverse cost on AVX-512.
(This changed was approved in https://reviews.llvm.org/D28118, but Simon asked to submit it separately).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290812 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-02 11:44:10 +00:00
Elena Demikhovsky
c2b6a16ee9 AVX-512 Loop Vectorizer: Cost calculation for interleave load/store patterns.
X86 target does not provide any target specific cost calculation for interleave patterns.It uses the common target-independent calculation, which gives very high numbers. As a result, the scalar version is chosen in many cases. The situation on AVX-512 is even worse, since we have 3-src shuffles that significantly reduce the cost.

In this patch I calculate the cost on AVX-512. It will allow to compare interleave pattern with gather/scatter and choose a better solution (PR31426).

* Shiffle-broadcast cost will be changed in Simon's upcoming patch.

Differential Revision: https://reviews.llvm.org/D28118



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290810 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-02 10:37:52 +00:00
Sanjay Patel
981c81199d [ValueTracking] add tests for known-nonnull-at; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290790 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-31 19:23:26 +00:00
Sanjoy Das
d9c611c77e [TBAAVerifier] Be stricter around verifying scalar nodes
This fixes the issue exposed in PR31393, where we weren't trying
sufficiently hard to diagnose bad TBAA metadata.

This does reduce the variety in the error messages we print out, but I
think the tradeoff of verifying more, simply and quickly overrules the
need for more helpful error messags here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290713 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-29 15:47:05 +00:00
Chandler Carruth
fad6a3fdf9 [PM] Teach MemDep to invalidate its result object when its cached
analysis handles become invalid.

Add a test case for its invalidation logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290620 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-27 19:33:04 +00:00
Chandler Carruth
0f9492a24a [PM] Add more dedicated testing to cover the invalidation logic added to
BasicAA in r290603.

I've kept the basic testing in the new PM test file as that also covers
the AAManager invalidation logic. If/when there is a good place for
broader AA testing it could move there.

This test is somewhat unsatisfying as I can't get it to fail even with
ASan outside of explicit checks of the invalidation. Apparently we don't
yet have any test coverage of the BasicAA code paths using either the
domtree or loopinfo -- I made both of them always be null and check-llvm
passed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290612 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-27 17:59:22 +00:00
Bryant Wong
f7285121c8 [AliasAnalysis] Teach BasicAA about memcpy.
Differential Revision: https://reviews.llvm.org/D27034

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290526 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-25 22:42:27 +00:00
Simon Pilgrim
373eadc326 [X86][SSE] Improve lowering of vXi64 multiplies
As mentioned on PR30845, we were performing our vXi64 multiplication as:

AloBlo = pmuludq(a, b);
AloBhi = pmuludq(a, psrlqi(b, 32));
AhiBlo = pmuludq(psrlqi(a, 32), b);
return AloBlo + psllqi(AloBhi, 32)+ psllqi(AhiBlo, 32);

when we could avoid one of the upper shifts with:

AloBlo = pmuludq(a, b);
AloBhi = pmuludq(a, psrlqi(b, 32));
AhiBlo = pmuludq(psrlqi(a, 32), b);
return AloBlo + psllqi(AloBhi + AhiBlo, 32);

This matches the lowering on gcc/icc.

Differential Revision: https://reviews.llvm.org/D27756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290267 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-21 20:00:10 +00:00
Michael Kuperstein
57ab82784d [ConstantFolding] Fix vector GEPs harder
For vector GEPs, CastGEPIndices can end up in an infinite recursion, because
we compare the vector type to the scalar pointer type, find them different,
and then try to cast a type to itself.

Differential Revision: https://reviews.llvm.org/D28009


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290260 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-21 17:34:21 +00:00
Daniel Jasper
47d6abcc05 Add files I seem to have dropped in my revert (r290086).
Sorry!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290087 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-19 08:32:13 +00:00
Daniel Jasper
8de3a54f07 Revert @llvm.assume with operator bundles (r289755-r289757)
This creates non-linear behavior in the inliner (see more details in
r289755's commit thread).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290086 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-19 08:22:17 +00:00
Matthew Simpson
ad1bdf6350 [AArch64] Guard Misaligned 128-bit store penalty by subtarget feature
This patch checks that the SlowMisaligned128Store subtarget feature is set
when penalizing such stores in getMemoryOpCost.

Differential Revision: https://reviews.llvm.org/D27677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289845 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 18:36:59 +00:00
Simon Pilgrim
255071b56f [CostModel][X86] Updated reverse shuffle costs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289819 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 14:24:07 +00:00
Simon Pilgrim
1e5c5ee6b5 [CostModel] Fix long standing bug with reverse shuffle mask detection
Incorrect 'undef' mask index matching meant that broadcast shuffles could be detected as reverse shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289811 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 12:12:45 +00:00