Commit Graph

22079 Commits

Author SHA1 Message Date
Eugene Zelenko
7211c537b1 [MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
Same changes in files affected by reduced MC headers dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-14 00:33:36 +00:00
Tim Northover
13a4b7e61f GlobalISel: represent atomic loads & stores via the MachineMemOperand.
Also make sure the AArch64 backend doesn't try to convert them into normal
loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 22:14:16 +00:00
Tim Northover
1a3fe2bfe6 MIR: parse & print the atomic parts of a MachineMemOperand.
We're going to need them very soon for GlobalISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 22:14:08 +00:00
Taewook Oh
47946adf77 Address post-commit comments for https://reviews.llvm.org/D29596. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294985 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 21:12:27 +00:00
Arnold Schwaighofer
db4a46b079 swiftcc: Don't emit tail calls from callers with swifterror parameters
Backends don't support this yet. They would have to move to the swifterror
register before the tail call to make sure it is live-in to the call.

rdar://30495920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294982 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 19:58:28 +00:00
Taewook Oh
9fdcd96d07 Make MachineBasicBlock::updateTerminator to update DebugLoc as well
Summary:
Currently MachineBasicBlock::updateTerminator simply drops DebugLoc for newly created branch instructions, which may cause incorrect stepping and/or imprecise sample profile data. Below is an example:

```
  1 extern int bar(int x);
  2
  3 int foo(int *begin, int *end) {
  4   int *i;
  5   int ret = 0;
  6   for (
  7       i = begin ;
  8       i != end ;
  9       i++)
 10   {
 11       ret += bar(*i);
 12   }
 13   return ret;
 14 }
```

Below is a bitcode of 'foo' at the end of LLVM-IR level optimizations with -O3:

```
define i32 @foo(i32* readonly %begin, i32* readnone %end) !dbg !4 {
entry:
  %cmp6 = icmp eq i32* %begin, %end, !dbg !9
  br i1 %cmp6, label %for.end, label %for.body.preheader, !dbg !12

for.body.preheader:                               ; preds = %entry
  br label %for.body, !dbg !13

for.body:                                         ; preds = %for.body.preheader, %for.body
  %ret.08 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
  %i.07 = phi i32* [ %incdec.ptr, %for.body ], [ %begin, %for.body.preheader ]
  %0 = load i32, i32* %i.07, align 4, !dbg !13, !tbaa !15
  %call = tail call i32 @bar(i32 %0), !dbg !19
  %add = add nsw i32 %call, %ret.08, !dbg !20
  %incdec.ptr = getelementptr inbounds i32, i32* %i.07, i64 1, !dbg !21
  %cmp = icmp eq i32* %incdec.ptr, %end, !dbg !9
  br i1 %cmp, label %for.end.loopexit, label %for.body, !dbg !12, !llvm.loop !22

for.end.loopexit:                                 ; preds = %for.body
  br label %for.end, !dbg !24

for.end:                                          ; preds = %for.end.loopexit, %entry
  %ret.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
  ret i32 %ret.0.lcssa, !dbg !24
}
```

where

```
!12 = !DILocation(line: 6, column: 3, scope: !11)
```

. As you can see, the terminator of 'entry' block, which is a loop control branch, has a DebugLoc of line 6, column 3. Howerver, after the execution of 'MachineBlock::updateTerminator' function, which is triggered by MachineSinking pass, the DebugLoc info is dropped as below (see there's no debug-location for JNE_1):

```
  bb.0.entry:
    successors: %bb.4(0x30000000), %bb.1.for.body.preheader(0x50000000)
    liveins: %rdi, %rsi

    %6 = COPY %rsi
    %5 = COPY %rdi
    %8 = SUB64rr %5, %6, implicit-def %eflags, debug-location !9
    JNE_1 %bb.1.for.body.preheader, implicit %eflags
```

This patch addresses this issue and make newly created branch instructions to keep debug-location info.

Reviewers: aprantl, MatzeB, craig.topper, qcolombet

Reviewed By: qcolombet

Subscribers: qcolombet, llvm-commits

Differential Revision: https://reviews.llvm.org/D29596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294976 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 18:15:31 +00:00
Quentin Colombet
58a124bd02 [FastISel] Add a diagnostic to warm on fallback.
This is consistent with what we do for GlobalISel. That way, it is easy
to see whether or not FastISel is able to fully select a function.
At some point we may want to switch that to an optimization remark.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 17:38:59 +00:00
Sanne Wouda
083bd6368a [Assembler] Improve diagnostics for inline assembly.
Summary:
Keep a vector of LocInfos around; one for each call to EmitInlineAsm.
Since each call to EmitInlineAsm creates a new buffer in the inline asm
SourceMgr, we can use the buffer number to map to the right LocInfo.

Reviewers: rengolin, grosbach, rnk, echristo

Reviewed By: rnk

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D29769


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294947 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 13:58:00 +00:00
Andrew V. Tischenko
ed1646e691 Compile time decreasing in the case we're dealing with Machine Combiner.
Before this patch compile time was about 21s (see below). After this patch
we have less than 2s (see bellow).

  Intel(R) Xeon(R) CPU E5-2676 v3 @ 2.40GHz

    DAGCombiner - trunk
        time ./llc spill_fdiv.ll -o /dev/null -enable-unsafe-fp-math
        real  0m1.685s

    DAGCombiner + Speed patch
        time ./llc spill_fdiv.ll -o /dev/null -enable-unsafe-fp-math
        real  0m1.655s

    MachineCombiner w/o Speed patch
        time ./llc spill_fdiv.ll -o /dev/null -enable-unsafe-fp-math
        real  0m21.614s

    MachineCombiner + Speed patch
        time ./llc spill_fdiv.ll -o /dev/null -enable-unsafe-fp-math
        real  0m1.593s

The test spill_fdiv.ll  is attached to D29627
D29627 should be closed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294936 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 09:43:37 +00:00
Craig Topper
5b7ece9f05 [DAGCombiner] Teach DAG combine that inserting an extract_subvector result into the same location of a an undef vector can just use the original input to the extract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294932 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-13 04:53:33 +00:00
Craig Topper
220d93f415 [DAGCombiner] Remove the half vector width check for the combine of EXTRACT_SUBVECTOR from an INSERT_SUBVECTOR.
This gives more parallelism opportunities for AVX-512 when dealing with 128-bit extracts from 512-bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294930 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-12 23:49:49 +00:00
Sanjay Patel
771a901cd4 [TargetLowering] fix SETCC SETLT folding with FP types
The bug was introduced with:
https://reviews.llvm.org/rL294863

...and manifests as a selection failure in x86, but that's actually
another bug. This fix prevents wrong codegen with -0.0, but in the
more common case when we have NSZ and NNAN (-ffast-math), we should 
still be able to fold this setcc/compare.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294924 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-12 23:07:52 +00:00
Craig Topper
a1a9b947dc [DAGCombiner] Make the combine of INSERT_SUBVECTOR into a CONCAT_VECTOR more generic to support larger concats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294875 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-11 22:57:09 +00:00
Sanjay Patel
57101fca7a [TargetLowering] check for sign-bit comparisons in SimplifyDemandedBits
I don't know if anything other than x86 vectors is affected by this change, but this may allow 
us to remove target-specific intrinsics for blendv* (vector selects). The simplification arises
from the fact that blendv* instructions only use the sign-bit when deciding which vector element
to choose for the destination vector. The mechanism to fold VSELECT into SHRUNKBLEND nodes already
exists in x86 lowering; this demanded bits change just enables the transform to fire more often.

The original motivation starts with a bug for DSE of masked stores that seems completely unrelated, 
but I've explained the likely steps in this series here:
https://llvm.org/bugs/show_bug.cgi?id=11210

Differential Revision: https://reviews.llvm.org/D29687


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294863 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-11 18:01:55 +00:00
Nico Weber
4a827800c6 Revert r294532, it caused PR31935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 21:57:30 +00:00
Tim Shen
2c44e216a8 [XRay] Implement powerpc64le xray.
Summary:
powerpc64 big-endian is not supported, but I believe that most logic can
be shared, except for xray_powerpc64.cc.

Also add a function InvalidateInstructionCache to xray_util.h, which is
copied from llvm/Support/Memory.cpp. I'm not sure if I need to add a unittest,
and I don't know how.

Reviewers: dberris, echristo, iteratee, kbarton, hfinkel

Subscribers: mehdi_amini, nemanjai, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D29742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294781 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 21:03:24 +00:00
Tim Northover
10fde8b13b GlobalISel: drop lifetime intrinsics during translation.
We don't use them yet and they just cause problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294770 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 19:10:38 +00:00
Simon Pilgrim
ada0a4f5b0 [DAGCombine] Allow vector constant folding of any value type before type legalization
The patch comes in 2 parts:

1 - it makes use of the SelectionDAG::NewNodesMustHaveLegalTypes flag to tell when it can safely constant fold illegal types.

2 - it correctly resets SelectionDAG::NewNodesMustHaveLegalTypes at the start of each call to SelectionDAGISel::CodeGenAndEmitDAG so all the pre-legalization stages can make use of it - not just the first basic block that gets handled.

Fix for PR30760

Differential Revision: https://reviews.llvm.org/D29568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294749 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 14:37:25 +00:00
Craig Topper
5b47011340 [SelectionDAG] Dump the DAG after legalizing vector ops and after the second type legalization
Summary:
With -debug, we aren't dumping the DAG after legalizing vector ops. In particular, on X86 with AVX1 only, we don't dump the DAG after we split 256-bit integer ops into pairs of 128-bit ADDs since this occurs during vector legalization.

I'm only dumping if the legalize vector ops changes something since we don't print anything during legalize vector ops. So this dump shows up right after the first type-legalization dump happens. So if nothing changed this second dump is unnecessary.

Having said that though, I think we should probably fix legalize vector ops to log what its doing.

Reviewers: RKSimon, eli.friedman, spatel, arsenm, chandlerc

Reviewed By: RKSimon

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D29554

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294711 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 05:05:57 +00:00
Eric Fiselier
a61fc423f3 [CMake] Fix pthread handling for out-of-tree builds
LLVM defines `PTHREAD_LIB` which is used by AddLLVM.cmake and various projects
to correctly link the threading library when needed. Unfortunately
`PTHREAD_LIB` is defined by LLVM's `config-ix.cmake` file which isn't installed
and therefore can't be used when configuring out-of-tree builds. This causes
such builds to fail since `pthread` isn't being correctly linked.

This patch attempts to fix that problem by renaming and exporting
`LLVM_PTHREAD_LIB` as part of`LLVMConfig.cmake`. I renamed `PTHREAD_LIB`
because It seemed likely to cause collisions with downstream users of
`LLVMConfig.cmake`.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294690 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 01:59:20 +00:00
Geoff Berry
e22db94a8f [SelectionDAG] Fix bugs in inverted condition splitting code.
Summary:
Fix two bugs in SelectionDAGBuilder::FindMergedConditions reported by
Mikael Holmen.  Handle non-canonicalized xor not operation
correctly (was assuming operand 0 was always the non-constant operand)
and check that the negated condition is also in the same block as the
original and/or instruction (as is done for and/or operands already)
before proceeding with optimization.

Reviewers: bogner, MatzeB, qcolombet

Subscribers: mcrosier, uabelho, llvm-commits

Differential Revision: https://reviews.llvm.org/D29680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294605 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 18:28:17 +00:00
David Bozier
32e76df475 Revert: "[Stack Protection] Add diagnostic information for why stack protection was applied to a function"
this reverts revision r294590 as it broke some buildbots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294593 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 15:40:14 +00:00
David Bozier
ed71bd2a51 [Stack Protection] Add diagnostic information for why stack protection was applied to a function
Stack Smash Protection is not completely free, so in hot code, the overhead it causes can cause performance issues. By adding diagnostic information for which function have SSP and why, a user can quickly determine what they can do to stop SSP being applied to a specific hot function.

This change adds an SSP-specific DiagnosticInfo class and uses of it to the Stack Protection code. A subsequent change to clang will cause the remarks to be emitted when enabled.

Patch by: James Henderson

Differential Revision: https://reviews.llvm.org/D29023



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294590 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 15:08:40 +00:00
Artur Pilipenko
66a342c211 [DAGCombiner] Support non-zero offset in load combine
Enable folding patterns which load the value from non-zero offset:

  i8 *a = ...
  i32 val = a[4] | (a[5] << 8) | (a[6] << 16) | (a[7] << 24)
=>
  i32 val = *((i32*)(a+4))

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D29394


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294582 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-09 12:06:01 +00:00
Wolfgang Pieb
2012b38a6b Reapply r294356 ("Keep track of spilled variables in LiveDebugValues").
Was reverted with r294447 due to undefined behavior with negative offsets
in DBG_VALUE instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294532 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 23:46:59 +00:00
Tim Northover
03324d2ec1 GlobalISel: legalize G_FPOW to a libcall on AArch64.
There's no instruction to implement it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294531 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 23:23:39 +00:00
Tim Northover
d8f030286c GlobalISel: translate @llvm.pow intrinsic to G_FPOW.
It'll usually be immediately legalized back to a libcall, but occasionally
something can be done with it so we'd just as well enable that flexibility from
the start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294530 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 23:23:32 +00:00
Tim Northover
063022b81a GlobalISel: expand mul-with-overflow into mul-hi on AArch64.
AArch64 has specific instructions to multiply two numbers at double the width
and produce the high part of the result. These can be used to implement LLVM's
mul.with.overflow instructions fairly simply. Helps with C++ operator new[].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294519 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 21:22:15 +00:00
Simon Dardis
e77177e867 [DebugInfo] Rename EmitDebugValue to EmitDebugThreadLocal (NFC)
As pointed out by David Blaikie in the post commit review of
r292624, EmitDebugValue should be called EmitDebugThreadLocal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294500 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 19:03:46 +00:00
Artur Pilipenko
a10aff5b13 [DAGCombiner] NFC. Mark ByteProvider accessors as const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294494 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 17:59:34 +00:00
Tim Northover
de0a86879f GlobalISel: translate @llvm.va_start intrinsic.
Because we need to preserve the memory access being performed we need a
separate instruction to represent this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294492 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 17:57:20 +00:00
Sanne Wouda
5896003cc3 [Assembler] Enable nicer diagnostics for inline assembly.
Fixed test.

Summary:
Enables source location in diagnostic messages from the backend.  This
is after parsing, during finalization.  This requires the SourceMgr, the
inline assembly string buffer, and DiagInfo to still be alive after
EmitInlineAsm returns.

This patch creates a single SourceMgr for inline assembly inside the
AsmPrinter.  MCContext gets a pointer to this SourceMgr.  Using one
SourceMgr per call to EmitInlineAsm would make it difficult for
MCContext to figure out in which SourceMgr the SMLoc is located, while a
single SourceMgr can figure it out if it has multiple buffers.

The Str argument to EmitInlineAsm is copied into a buffer and owned by
the inline asm SourceMgr.  This ensures that DiagHandlers won't print
garbage.  (Clang emits a "note: instantiated into assembly here", which
refers to this string.)

The AsmParser gets destroyed before finalization, which means that the
DiagHandlers the AsmParser installs into the SourceMgr will be stale.
Restore the saved DiagHandlers.

Since now we're using just one SourceMgr for multiple inline asm
strings, we need to tell the AsmParser which buffer it needs to parse
currently.  Hand a buffer id -- returned from SourceMgr::
AddNewSourceBuffer -- to the AsmParser.

Reviewers: rnk, grosbach, compnerd, rengolin, rovka, anemet

Reviewed By: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29441
    


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294458 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 14:48:05 +00:00
Diana Picus
a32d7c935e Revert "[Assembler] Enable nicer diagnostics for inline assembly."
This reverts commit r294433 because it seems it broke the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294448 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 14:02:16 +00:00
NAKAMURA Takumi
22bcc0ea37 Revert r294356, "DebugInfo: Track spilled variables in LiveDebugValues"
It caused undefined behavior in VarLoc. As far as I investigated,

  - VarLoc::VarLoc() treats negative offset value as InvalidKind.
    Consider the case that (int64_t)MI.getOperand(1).getImm() is negative and whether it satisfies ((uint64_t)Offset < (1ULL << 32)).

  - Comparison operators in VarLoc behave undefined since VarLoc::Loc.Hash is uninitialized in case of InvalidKind.

I guess Offset (in VarLoc) could be made aware of signed, but I am not sure.
So I have reverted it for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294447 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 13:49:28 +00:00
Sanne Wouda
5ddc432093 [Assembler] Enable nicer diagnostics for inline assembly.
Summary:
Enables source location in diagnostic messages from the backend.  This
is after parsing, during finalization.  This requires the SourceMgr, the
inline assembly string buffer, and DiagInfo to still be alive after
EmitInlineAsm returns.

This patch creates a single SourceMgr for inline assembly inside the
AsmPrinter.  MCContext gets a pointer to this SourceMgr.  Using one
SourceMgr per call to EmitInlineAsm would make it difficult for
MCContext to figure out in which SourceMgr the SMLoc is located, while a
single SourceMgr can figure it out if it has multiple buffers.

The Str argument to EmitInlineAsm is copied into a buffer and owned by
the inline asm SourceMgr.  This ensures that DiagHandlers won't print
garbage.  (Clang emits a "note: instantiated into assembly here", which
refers to this string.)

The AsmParser gets destroyed before finalization, which means that the
DiagHandlers the AsmParser installs into the SourceMgr will be stale.
Restore the saved DiagHandlers.

Since now we're using just one SourceMgr for multiple inline asm
strings, we need to tell the AsmParser which buffer it needs to parse
currently.  Hand a buffer id -- returned from SourceMgr::
AddNewSourceBuffer -- to the AsmParser.

Reviewers: rnk, grosbach, compnerd, rengolin, rovka, anemet

Reviewed By: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29441


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294433 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 10:20:07 +00:00
Matt Arsenault
a647924c48 TargetLowering: Remove AddrSpace parameter from GetAddrModeArguments
It doesn't make any sense to pass in to what is supposed to be parsing
the call, and this can be inferred from the pointer output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294412 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 07:09:03 +00:00
Amaury Sechet
8eea5ab6a2 [DAGCombiner] Push truncate through adde when the carry isn't used.
Summary: As per title.

Reviewers: mkuper, spatel, bkramer, RKSimon, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29528

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294394 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 00:32:36 +00:00
Wolfgang Pieb
0956efb856 DebugInfo: Track spilled variables in LiveDebugValues
When variables are spilled to the stack by the register allocator, keep track of their
debug locations in LiveDebugValues and insert DBG_VALUE instructions at the appropriate
place. Ensure that the locations are propagated down the dominator tree via the existing 
mechanisms.

Reviewer: aprantl

Differential Revision: https://reviews.llvm.org/D29500


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2017-02-07 21:23:15 +00:00
Hans Wennborg
34a6e0d36a [X86] Disable conditional tail calls (PR31257)
They are currently modelled incorrectly (as calls, which clobber
registers, confusing e.g. Machine Copy Propagation).

Reverting until we figure out the proper solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294348 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-07 20:37:45 +00:00
Tim Northover
dabb7fcdd6 GlobalISel: translate @llvm.va_end intrinsic.
Turns out no-one actually cares about this one (at least) in tree so we can
just drop it entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294345 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-07 20:08:59 +00:00
Sanjoy Das
a0be0b1390 [ImplicitNullCheck] Extend Implicit Null Check scope by using stores
Summary:
This change allows usage of store instruction for implicit null check.

Memory Aliasing Analisys is not used and change conservatively supposes
that any store and load may access the same memory. As a result
re-ordering of store-store, store-load and load-store is prohibited.

Patch by Serguei Katkov!

Reviewers: reames, sanjoy

Reviewed By: sanjoy

Subscribers: atrick, llvm-commits

Differential Revision: https://reviews.llvm.org/D29400

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2017-02-07 19:19:49 +00:00
Reid Kleckner
e975b155eb [SDAGISel] Simplify some SDAGISel code, NFC
Hoist entry block code for arguments and swift error values out of the
basic block instruction selection loop. Lowering arguments once up front
seems much more readable than doing it conditionally inside the loop. It
also makes it clear that argument lowering can update StaticAllocaMap
because no instructions have been selected yet.

Also use range-based for loops where possible.

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2017-02-07 18:42:53 +00:00
Sanjay Patel
a1d2453472 [TargetLowering] fix formatting and comments for ShrinkDemandedConstant; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294325 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-07 18:04:26 +00:00
Igor Laevsky
5ac65c9c9a [CodeGenPrepare] Hoist all getSubtargetImpl calls to the beginning of the pass
Differential Revision: https://reviews.llvm.org/D29456



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2017-02-07 13:27:20 +00:00
Daniel Jasper
7085bdc3ce Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"
This reverts commit r294186.

On an internal test, this triggers an out-of-memory error on PPC,
presumably because there is another dagcombine that does the exact
opposite triggering and endless loop consuming more and more memory.

Chandler has started at creating a reduced test case and we'll attach it
as soon as possible.

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2017-02-07 08:57:50 +00:00
Matthias Braun
91d3cab4fd RegisterCoalescer: Fix joinReservedPhysReg()
joinReservedPhysReg() can only deal with a liverange in a single basic
block when copying from a vreg into a physreg.

See also rdar://30306405

Differential Revision: https://reviews.llvm.org/D29436

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2017-02-07 01:59:39 +00:00
Tim Northover
ff6fd30dfb GlobalISel: legalize narrow G_SELECTS on AArch64.
Otherwise there aren't any patterns to select them.

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2017-02-06 23:41:27 +00:00
Tim Northover
bfa46663d1 GlobalISel: legalize G_INSERT instructions
We don't handle all cases yet (see arm64-fallback.ll for an example), but this
is enough to cover most common C++ code so it's a good place to start.

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2017-02-06 21:56:47 +00:00
Artur Pilipenko
e7cc4f3c59 [DAGCombiner] Support bswap as a part of load combine patterns
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D29397


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2017-02-06 17:48:08 +00:00
Amaury Sechet
6f12c47b49 Add ADDC to SelectionDAG::computeKnownBits and ComputeNumSignBits.
Summary: As per title.

Reviewers: bkramer, sunfish, lattner, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29521

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2017-02-06 14:59:06 +00:00