Commit Graph

13 Commits

Author SHA1 Message Date
Daniel Sanders
f31ac9d1e8 [globalisel][tablegen] Compute available feature bits correctly.
Summary:
Predicate<> now has a field to indicate how often it must be recomputed.
Currently, there are two frequencies, per-module (RecomputePerFunction==0)
and per-function (RecomputePerFunction==1). Per-function predicates are
currently recomputed more frequently than necessary since the only predicate
in this category is cheap to test. Per-module predicates are now computed in
getSubtargetImpl() while per-function predicates are computed in selectImpl().

Tablegen now manages the PredicateBitset internally. It should only be
necessary to add the required includes.

Also fixed a problem revealed by the test case where
constrainSelectedInstRegOperands() would attempt to tie operands that
BuildMI had already tied.

Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar

Reviewed By: rovka

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D32491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301750 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-29 17:30:09 +00:00
Aditya Nandakumar
4925efae1f [GISEL]: Move getConstantVReg to Utils
NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300751 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-19 20:48:50 +00:00
Daniel Sanders
690f0b25ab [tablegen][globalisel] Add support for nested instruction matching.
Summary:
Lift the restrictions that prevented the tree walking introduced in the
previous change and add support for patterns like:
  (G_ADD (G_MUL (G_SEXT $src1), (G_SEXT $src2)), $src3) -> SMADDWrrr $dst, $src1, $src2, $src3
Also adds support for G_SEXT and G_ZEXT to support these cases.

One particular aspect of this that I should draw attention to is that I've
tried to be overly conservative in determining the safety of matches that
involve non-adjacent instructions and multiple basic blocks. This is intended
to be used as a cheap initial check and we may add a more expensive check in
the future. The current rules are:
* Reject if any instruction may load/store (we'd need to check for intervening
  memory operations.
* Reject if any instruction has implicit operands.
* Reject if any instruction has unmodelled side-effects.
See isObviouslySafeToFold().

Reviewers: t.p.northover, javed.absar, qcolombet, aditya_nandakumar, ab, rovka

Reviewed By: ab

Subscribers: igorb, dberris, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30539



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299430 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-04 13:25:23 +00:00
Ahmed Bougacha
fb6a2d6627 [GlobalISel] Add a 'getConstantVRegVal' helper.
Use it to compare immediate operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298855 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 16:35:27 +00:00
Ahmed Bougacha
32431f2d21 [GlobalISel] Move method definition to the proper file. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298221 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-19 16:12:48 +00:00
Igor Breger
8ae3570fa8 [X86][GlobalISel] Initial implementation , select G_ADD gpr, gpr
Summary: Initial implementation for X86InstructionSelector. Handle selection COPY and G_ADD/G_SUB gpr, gpr .

Reviewers: qcolombet, rovka, zvi, ab

Reviewed By: rovka

Subscribers: mgorny, dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D29816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295824 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-22 12:25:09 +00:00
Quentin Colombet
b993023ac9 [GlobalISel] Refactor the logic to constraint registers.
Move the logic to constraint register from InstructionSelector to a
utility function. It will be required by other passes in the GlobalISel
pipeline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290374 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-22 21:56:19 +00:00
Diana Picus
b1879fb1fb [ARM] GlobalISel: Select add i32, i32
Add the minimal support necessary to select a function that returns the sum of
two i32 values.

This includes some support for argument/return lowering of i32 values through
registers, as well as the handling of copy and add instructions throughout the
GlobalISel pipeline.

Differential Revision: https://reviews.llvm.org/D26677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289940 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-16 12:54:46 +00:00
Tim Northover
b725b3cddf GlobalISel: select G_GLOBAL_VALUE uses on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283809 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-10 21:50:00 +00:00
Ahmed Bougacha
cefc0d378a [AArch64][GlobalISel] Select G_MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278810 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-16 14:37:46 +00:00
Ahmed Bougacha
b92cbd8f41 [AArch64][GlobalISel] Select p0 G_FRAME_INDEX.
And mark it as legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278802 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-16 14:02:42 +00:00
Ahmed Bougacha
8d4e8d2a52 [AArch64][GlobalISel] Select G_LOAD/G_STORE.
Mostly straightforward as we ignore addressing modes and just
use the base + unsigned immediate offset (always 0) variants.

This currently fails to select extloads because we have yet to
agree on a representation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277171 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-29 16:56:16 +00:00
Ahmed Bougacha
f15a020711 [GlobalISel] Introduce an instruction selector.
And implement it for AArch64, supporting x/w ADD/OR.

Differential Revision: https://reviews.llvm.org/D22373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 14:31:55 +00:00