Commit Graph

10 Commits

Author SHA1 Message Date
Quentin Colombet
0e156ed701 [RegisterBankInfo] Change the API for the verify methods.
Return bool instead of void so that it is natural to put the calls into
asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267033 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-21 18:34:43 +00:00
Quentin Colombet
99b0ca43ae [RegisterBankInfo] Change the representation of the partial mappings.
Instead of holding a mask, hold two value: the start index and the
length of the mapping. This is a more compact representation, although
less powerful. That being said, arbitrary masks would not have worked
for the generic so do not allow them in the first place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267025 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-21 18:09:34 +00:00
Quentin Colombet
1a11591ceb [RegBankSelect] Teach the repairing code how to handle physical
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266029 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:38:51 +00:00
Quentin Colombet
be78bfb92c [RegBankSelect] Teach how to repair definitions.
Although repairing definitions is not mandatory for correctness (only
phis would be impacted because of the RPO traversal), not repairing
might go against the cost model. Therefore, just repair when it is
possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266025 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-12 00:12:59 +00:00
Quentin Colombet
30e994292c [RegBankSelect] Use reverse post order traversal.
When assigning the register banks of an instruction, it is best to know
all the constraints of the input to have a good idea of how this will
impact the cost of the whole function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265812 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 17:19:10 +00:00
Quentin Colombet
0874850952 [RegBankSelect] Improve debug output.
Add verbose information when checking if the current and the desired
register banks match.
Detail what happens when we assign a register bank.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265804 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 16:48:16 +00:00
Quentin Colombet
2a2fe8fcd2 [RegBankSelect] Add a few debug statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265749 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 23:53:55 +00:00
Quentin Colombet
7880f4315b [RegBankSelect] Reuse RegisterBankInfo logic to get to the register bank
from a register.
On top of duplicating the logic, it was buggy! It would assert on
physical registers, since MachineRegisterInfo does not have any
information regarding register classes/banks for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265727 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 21:32:23 +00:00
Quentin Colombet
13588d8354 [RegBankSelect] Initial implementation for non-optimized output.
The pass walk through the machine function and assign the register banks
using the default mapping. In other words, there is no attempt to reduce
cross register copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265707 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-07 18:19:27 +00:00
Quentin Colombet
278bb5de48 [GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register
banks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265440 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-05 19:06:01 +00:00