Commit Graph

403 Commits

Author SHA1 Message Date
Derek Schuff
b63ec0f596 [WebAssembly] Remove our copy of PrologEpilogInserter
It's no longer needed after r269750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269756 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-17 11:18:35 +00:00
Derek Schuff
4bfd3e29b1 Factor PrologEpilogInserter around spilling, frame finalization, and scavenging
PrologEpilogInserter has these 3 phases, which are related, but not
all of them are needed by all targets. This patch reorganizes PEI's
varous functions around those phases for more clear separation. It also
introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true
for non-virtual targets. When it is true, all the phases operate as
before, and PEI requires the AllVRegsAllocated property on
MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and
only prolog/epilog insertion/frame finalization is done.

Differential Revision: http://reviews.llvm.org/D18366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269750 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-17 08:49:59 +00:00
Dan Gohman
c1fd522352 [WebAssembly] Improve the precision of memory and side effect dependence tracking.
MachineInstr::isSafeToMove is more conservative than is needed here;
use a more explicit check, and incorporate knowledge of some
WebAssembly-specific opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269736 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-17 04:05:31 +00:00
Dan Gohman
594d70d5cc [WebAssembly] Mark COPY_LOCAL and TEE_LOCAL instructions has having no side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269683 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 19:16:32 +00:00
Dan Gohman
b57691df7a [WebAssembly] Use eqz to negate a branch conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269681 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 18:59:34 +00:00
Dan Gohman
b5e78617f3 [WebAssembly] Add a few optimization ideas to README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269677 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 18:51:03 +00:00
Dan Gohman
c40a684451 [WebAssembly] Fix legalization of i128 shifts.
compiler-rt/libgcc shift routines expect the shift count to be an i32, so
use i32 as the shift count for shifts that are legalized to libcalls. This
also reverts r268991, now that the signatures are correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269531 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 02:15:47 +00:00
Derek Schuff
505ba6dd9a [WebAssembly] Update expected torture test failures
NFC; the waterfall just changed the way they are built.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269523 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 00:22:17 +00:00
Justin Bogner
20520cf22a SDAG: Implement Select instead of SelectImpl in WebAssemblyDAGToDAGISel
This backend doesn't do anything custom here yet, so we just modernize
the boilerplate.

Part of llvm.org/pr26808.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269506 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 22:44:57 +00:00
Dan Gohman
ca8feb05bb [WebAssembly] Fast-isel support for calls, arguments, and selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269273 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-12 04:19:09 +00:00
Dan Gohman
9cc168109a [WebAssembl] Implement enough of fast-isel to run the comparison tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269203 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-11 16:32:42 +00:00
Dan Gohman
f02416f9ad [WebAssembly] Preliminary fast-isel support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269083 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 17:39:48 +00:00
Dan Gohman
01a542927d [WebAssembly] Move register stackification and coloring to a late phase.
Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. This means that all code emitted
and expanded by those passes is now exposed to these passes. This also
eliminates the need for prologue/epilogue code to be manually stackified,
which significantly simplifies the code.

This does require running LiveIntervals a second time. It's useful to think
of these late passes not as late optimization passes, but as a domain-specific
compression algorithm based on knowledge of liveness information. It's used to
compress the code after all conventional optimizations are complete, which is
why it uses LiveIntervals at a phase when actual optimization passes don't
typically need it.

Differential Revision: http://reviews.llvm.org/D20075


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269012 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 04:24:02 +00:00
Matthias Braun
6a6190de10 CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269011 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 03:21:59 +00:00
Derek Schuff
42a5196098 [WebAssembly] Disable 128-bit shift libcalls
Currently the signature of the functions
i128(i128, i32) aka void(i32, i64, i64, i32) doesn't match the signature
of the call emitted by the default lowering, void(i32, i64, i64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268991 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 00:14:07 +00:00
Justin Bogner
9ed38db20e SDAG: Rename Select->SelectImpl and repurpose Select as returning void
This is a step towards removing the rampant undefined behaviour in
SelectionDAG, which is a part of llvm.org/PR26808.

We rename SelectionDAGISel::Select to SelectImpl and update targets to
match, and then change Select to return void and consolidate the
sketchy behaviour we're trying to get away from there.

Next, we'll update backends to implement `void Select(...)` instead of
SelectImpl and eventually drop the base Select implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268693 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 23:19:08 +00:00
Dan Gohman
9281534899 [WebAssembly] Don't emit epilogue code in the middle of stackified code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268679 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:41:15 +00:00
Derek Schuff
1e477250a6 [WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent renaming in the wasm spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268255 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-02 17:25:22 +00:00
Craig Topper
4366cdb0c2 [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267853 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-28 03:34:31 +00:00
Dan Gohman
1a09f22368 [WebAssembly] Account for implicit operands when computing operand indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267511 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-26 01:40:56 +00:00
Craig Topper
bd49c65d03 [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267264 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-23 02:49:25 +00:00
Dan Gohman
e0dd87a040 [WebAssembly] Limit alignment hints to natural alignment.
This follows the current binary format rules.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267082 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-21 23:59:48 +00:00
Sanjoy Das
07f6d807bc Disable the PatchableFunction pass for NVPTX & Wasm
PatchableFunction requires AllVRegsAllocated that these targets don't
provide.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266720 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-19 06:24:58 +00:00
Eric Liu
e87a43ef03 Include SmallVector.h header in lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266606 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-18 12:21:59 +00:00
Mehdi Amini
f6071e14c5 [NFC] Header cleanup
Removed some unused headers, replaced some headers with forward class declarations.

Found using simple scripts like this one:
clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap'

Patch by Eugene Kosov <claprix@yandex.ru>

Differential Revision: http://reviews.llvm.org/D19219

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-18 09:17:29 +00:00
Matthias Braun
dc2f859a3f RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265511 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-06 02:47:09 +00:00
Hans Wennborg
f864a32c13 Change eliminateCallFramePseudoInstr() to return an iterator
This will become necessary in a subsequent change to make this method
merge adjacent stack adjustments, i.e. it might erase the previous
and/or next instruction.

It also greatly simplifies the calls to this function from Prolog-
EpilogInserter. Previously, that had a bunch of logic to resume iteration
after the call; now it just continues with the returned iterator.

Note that this changes the behaviour of PEI a little. Previously,
it attempted to re-visit the new instruction created by
eliminateCallFramePseudoInstr(). That code was added in r36625,
but I can't see any reason for it: the new instructions will obviously
not be pseudo instructions, they will not have FrameIndex operands,
and we have already accounted for the stack adjustment.

Differential Revision: http://reviews.llvm.org/D18627

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265036 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-31 18:33:38 +00:00
Derek Schuff
f7e437566e [WebAssembly] Remove duplicate disabling of passes
Also put all the disabled passes together

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264684 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-28 22:52:20 +00:00
Derek Schuff
fadd113c9b Introduce MachineFunctionProperties and the AllVRegsAllocated property
MachineFunctionProperties represents a set of properties that a MachineFunction
can have at particular points in time. Existing examples of this idea are
MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which
will eventually be switched to use this mechanism.
This change introduces the AllVRegsAllocated property; i.e. the property that
all virtual registers have been allocated and there are no VReg operands
left.

With this mechanism, passes can declare that they require a particular property
to be set, or that they set or clear properties by implementing e.g.
MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class
verifies that the requirements are met, and handles the setting and clearing
based on the delcarations. Passes can also directly query and update the current
properties of the MF if they want to have conditional behavior.

This change annotates the target-independent post-regalloc passes; future
changes will also annotate target-specific ones.

Reviewers: qcolombet, hfinkel

Differential Revision: http://reviews.llvm.org/D18421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264593 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-28 17:05:30 +00:00
Dan Gohman
35d7235fd8 [WebAssembly] Implement the rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264076 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-22 18:01:49 +00:00
Dan Gohman
c13556c771 [WebAssembly] Implement the eqz instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263976 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-21 19:54:41 +00:00
Derek Schuff
3d15212029 [WebAssembly] Stackify code emitted by eliminateFrameIndex and SP writeback
Summary:
MRI::eliminateFrameIndex can emit several instructions to do address
calculations; these can usually be stackified. Because instructions with
FI operands can have subsequent operands which may be expression trees,
find the top of the leftmost tree and insert the code before it, to keep
the LIFO property.

Also use stackified registers when writing back the SP value to memory
in the epilog; it's unnecessary because SP will not be used after the
epilog, and it results in better code.

Differential Revision: http://reviews.llvm.org/D18234

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263725 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-17 17:00:29 +00:00
Hans Wennborg
5015b2074c Try to fix build of WebAssemblyRegStackify.cpp on Windows
It's failing to build on VS2015 with:

C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520):
error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function
C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217):
note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)'
        with
        [
            IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
        ]
C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217):
note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup]
        with
        [
            _RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
        ]

I don't have VS2015 locally at the moment, but hopefully this will help.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263418 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-14 11:04:15 +00:00
Dan Gohman
7a0d68c080 [WebAssembly] Add final keywords to a few more subclasses, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263287 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 19:45:37 +00:00
Derek Schuff
70438f5c80 [WebAssembly] Update known gcc test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 22:14:33 +00:00
Dan Gohman
0f7f7def70 [WebAssembly] Update comments about irreducible control flow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262995 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 04:17:36 +00:00
Dan Gohman
09588765a8 [WebAssembly] Implement irreducible control flow.
This implements a very simple conservative transformation that doesn't
require more than linear code size growth. There's room for much more
optimization in this space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262982 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-09 02:01:14 +00:00
Dan Gohman
2d88e345fe [WebAssembly] Update for spec change from tableswitch to br_table.
Also note that the operand order changed; the default label is now listed
after the regular labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262903 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-08 03:18:12 +00:00
Dan Gohman
a05c5de67c [WebAssembly] Add another possible code-size optimization to README.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262740 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-04 20:09:57 +00:00
JF Bastien
df4c0fa9a0 WebAssembly: fix build
More API churn, experimental target got sad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262179 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-28 15:33:53 +00:00
JF Bastien
cb7b2cb2b3 WebAssembly: fix build
It was broken by the work for PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262140 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 16:38:23 +00:00
Derek Schuff
e5a3819fc8 Revert "[WebAssembly] Stackify code emitted by eliminateFrameIndex"
This reverts r261685 due to wasm test breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261702 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 22:13:21 +00:00
Derek Schuff
64f8810499 [WebAssembly] Stackify code emitted by eliminateFrameIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261685 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 21:25:17 +00:00
Derek Schuff
c15325e5a1 [WebAssembly] Add TODO comment to revisit red zone size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261664 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:17:46 +00:00
Derek Schuff
8ff73c1307 [WebAssembly] Implement red zone for user stack
Implements a mostly-conventional redzone for the userspace
stack. Because we have unsigned load/store offsets we continue to use a
local SP subtracted from the incoming SP but do not write it back to
memory.

Differential Revision: http://reviews.llvm.org/D17525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261662 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 18:13:07 +00:00
Derek Schuff
718d992d1f [WebAssembly] Fix writeback of stack pointer with dynamic alloca
Previously the stack pointer was only written back to memory in the
prolog. But this is wrong for dynamic allocas, for which
target-independent codegen handles SP updates after the prolog (and
possibly even in another BB). Instead update the SP global in
ADJCALLSTACKDOWN which is generated after the SP update sequence.
This will have further refinements when we add red zone support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261579 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 21:57:17 +00:00
Dan Gohman
e1553a649a [WebAssembly] Re-enable the TailDuplicate pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261566 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:47:12 +00:00
JF Bastien
4a8755bfe6 WebAssembly: update expected failures
clang r261557 lowers va_arg in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261564 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:37:34 +00:00
Dan Gohman
1b10833563 [WebAssembly] Teach address folding to fold bitwise-or nodes.
LLVM converts adds into ors when it can prove that the operands don't share
any non-zero bits. Teach address folding to recognize or instructions with
constant operands with this property that can be folded into addresses as
if they were adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261562 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 20:04:02 +00:00
Dan Gohman
125ad6e3d9 [WebAssembly] Properly ignore llvm.dbg.value instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261538 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 17:45:20 +00:00