Commit Graph

2619 Commits

Author SHA1 Message Date
Alexey Bataev
b415523f30 [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4

```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.

Reviewers: RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40304

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320157 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-08 15:32:10 +00:00
Igor Laevsky
e18338969d [InstCombine] Don't crash on out of bounds index in the insertelement
Differential Revision: https://reviews.llvm.org/D40390



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-07 15:00:52 +00:00
Sanjay Patel
2b68e112a3 [InstCombine] canonicalize constant-minus-boolean to select-of-constants
This restores the half of:
https://reviews.llvm.org/rL75531
that was reverted at:
https://reviews.llvm.org/rL159230

For the x86 case mentioned there, we now produce:
leal 1(%rdi), %eax
subl %esi, %eax

We have target hooks to invert this in DAGCombiner (and x86 is enabled) with:
https://reviews.llvm.org/rL296977
https://reviews.llvm.org/rL311731

AArch64 and possibly other targets would probably benefit from enabling those hooks too. 
See PR30327:
https://bugs.llvm.org/show_bug.cgi?id=30327#c2

Differential Revision: https://reviews.llvm.org/D40612


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319964 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-06 21:22:57 +00:00
Sanjay Patel
c7c532a9fd [InstCombine] use 'auto' with 'dyn_cast'; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319067 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-27 18:19:32 +00:00
Sanjay Patel
40d25eb85d [InstCombine] include 'sub' in the list of narrow-able binops
// trunc (binop X, C) --> binop (trunc X, C')
      // trunc (binop (ext X), Y) --> binop X, (trunc Y)

I'm grouping sub with the other binops  because that makes the code simpler
and the transforms are valid:
https://rise4fun.com/Alive/UeF
...so even though we don't expect a sub with constant Op1 or any of the
other opcodes with constant Op0 due to canonicalization rules, we might as
well handle those situations if non-canonical code somehow reaches this
point (it should just make instcombine more efficient in reaching its
end goal).

This should solve the problem that later manifests in the vectorizers in 
PR35295:
https://bugs.llvm.org/show_bug.cgi?id=35295



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318404 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-16 14:40:51 +00:00
Sanjay Patel
c8be5de456 [InstCombine] trunc (binop X, C) --> binop (trunc X, C')
Note that one-use and shouldChangeType() are checked ahead of the switch.

Without the narrowing folds, we can produce inferior vector code as shown in PR35299:
https://bugs.llvm.org/show_bug.cgi?id=35299



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318323 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 19:12:01 +00:00
Reid Kleckner
869a0096cd [InstCombine] Salvage debug info during initial DCE
InstCombine salvages debug info for every instruction it erases from its
worklist, but it wasn't doing it during its initial DCE when populating
its worklist. This fixes that.

This should help improve availability of 'this' in optimized debug info
when casts are necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 18:51:12 +00:00
Craig Topper
0612ed0350 [InstCombine] Simplify binops that are only used by a select and are fed by a select with the same condition.
Summary:
This patch optimizes a binop sandwiched between 2 selects with the same condition. Since we know its only used by the select we can propagate the appropriate input value from the earlier select.

As I'm writing this I realize I may need to avoid doing this for division in case the select was protecting a divide by zero?

Reviewers: spatel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318267 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 05:23:02 +00:00
Craig Topper
5b555fa10e [InstCombine] Teach visitICmpInst to not break integer absolute value idioms
Summary:
This patch adds an early out to visitICmpInst if we are looking at a compare as part of an integer absolute value idiom. Similar is already done for min/max.

In the particular case I observed in a benchmark we had an absolute value of a load from an indexed global. We simplified the compare using foldCmpLoadFromIndexedGlobal into a magic bit vector, a shift, and an and. But the load result was still used for the select and the negate part of the absolute valute idiom. So we overcomplicated the code and lost the ability to recognize it as an absolute value.

I've chosen a simpler case for the test here.

Reviewers: spatel, davide, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-12 02:28:21 +00:00
Craig Topper
7e1904e9c8 Recommit r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
The hexagon test should be fixed now.

Original commit message:

This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317600 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-07 18:47:24 +00:00
Craig Topper
3c64d8ff3a [InstCombine] Update stale comment. NFC
Datalayout is no longer optional so the comment didn't match what the code currently does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317594 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-07 17:37:32 +00:00
Hans Wennborg
e209a1a12d Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.

> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317518 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 22:28:02 +00:00
Craig Topper
aceaaf0aec [InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 21:07:22 +00:00
Sanjay Patel
00e900afdb [IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/107104.html
and again more recently:
http://lists.llvm.org/pipermail/llvm-dev/2017-October/118118.html

...this is a step in cleaning up our fast-math-flags implementation in IR to better match
the capabilities of both clang's user-visible flags and the backend's flags for SDNode.

As proposed in the above threads, we're replacing the 'UnsafeAlgebra' bit (which had the 
'umbrella' meaning that all flags are set) with a new bit that only applies to algebraic 
reassociation - 'AllowReassoc'.

We're also adding a bit to allow approximations for library functions called 'ApproxFunc' 
(this was initially proposed as 'libm' or similar).

...and we're out of bits. 7 bits ought to be enough for anyone, right? :) FWIW, I did 
look at getting this out of SubclassOptionalData via SubclassData (spacious 16-bits), 
but that's apparently already used for other purposes. Also, I don't think we can just 
add a field to FPMathOperator because Operator is not intended to be instantiated. 
We'll defer movement of FMF to another day.

We keep the 'fast' keyword. I thought about removing that, but seeing IR like this:
%f.fast = fadd reassoc nnan ninf nsz arcp contract afn float %op1, %op2
...made me think we want to keep the shortcut synonym.

Finally, this change is binary incompatible with existing IR as seen in the 
compatibility tests. This statement:
"Newer releases can ignore features from older releases, but they cannot miscompile 
them. For example, if nsw is ever replaced with something else, dropping it would be 
a valid way to upgrade the IR." 
( http://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility )
...provides the flexibility we want to make this change without requiring a new IR 
version. Ie, we're not loosening the FP strictness of existing IR. At worst, we will 
fail to optimize some previously 'fast' code because it's no longer recognized as 
'fast'. This should get fixed as we audit/squash all of the uses of 'isFast()'.

Note: an inter-dependent clang commit to use the new API name should closely follow 
commit.

Differential Revision: https://reviews.llvm.org/D39304



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317488 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 16:27:15 +00:00
Matthew Simpson
4f7d658ee0 [InstCombine] Simplify selects that test cmpxchg instructions
If a select instruction tests the returned flag of a cmpxchg instruction and
selects between the returned value of the cmpxchg instruction and its compare
operand, the result of the select will always be equal to its false value.

Differential Revision: https://reviews.llvm.org/D39383

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-31 12:34:02 +00:00
Daniel Neilson
8e9d06e47c Create instruction classes for identifying any atomicity of memory intrinsic. (NFC)
Summary:
For reference, see: http://lists.llvm.org/pipermail/llvm-dev/2017-August/116589.html

This patch fleshes out the instruction class hierarchy with respect to atomic and
non-atomic memory intrinsics. With this change, the relevant part of the class
hierarchy becomes:

IntrinsicInst
  -> MemIntrinsicBase (methods-only class)
    -> MemIntrinsic (non-atomic intrinsics)
      -> MemSetInst
      -> MemTransferInst
        -> MemCpyInst
        -> MemMoveInst
    -> AtomicMemIntrinsic (atomic intrinsics)
      -> AtomicMemSetInst
      -> AtomicMemTransferInst
        -> AtomicMemCpyInst
        -> AtomicMemMoveInst
    -> AnyMemIntrinsic (both atomicities)
      -> AnyMemSetInst
      -> AnyMemTransferInst
        -> AnyMemCpyInst
        -> AnyMemMoveInst

This involves some class renaming:
    ElementUnorderedAtomicMemCpyInst -> AtomicMemCpyInst
    ElementUnorderedAtomicMemMoveInst -> AtomicMemMoveInst
    ElementUnorderedAtomicMemSetInst -> AtomicMemSetInst
A script for doing this renaming in downstream trees is included below.

An example of where the Any* classes should be used in LLVM is when reasoning
about the effects of an instruction (ex: aliasing).

---
Script for renaming AtomicMem* classes:
PREFIXES="[<,([:space:]]"
CLASSES="MemIntrinsic|MemTransferInst|MemSetInst|MemMoveInst|MemCpyInst"
SUFFIXES="[;)>,[:space:]]"

REGEX="(${PREFIXES})ElementUnorderedAtomic(${CLASSES})(${SUFFIXES})"
REGEX2="visitElementUnorderedAtomic(${CLASSES})"

FILES=$( grep -E "(${REGEX}|${REGEX2})" -r . | tr ':' ' ' | awk '{print $1}' | sort | uniq )

SED_SCRIPT="s~${REGEX}~\1Atomic\2\3~g"
SED_SCRIPT2="s~${REGEX2}~visitAtomic\1~g"

for f in $FILES; do
    echo "Processing: $f"
    sed  -i ".bak" -E "${SED_SCRIPT};${SED_SCRIPT2};${EA_SED_SCRIPT};${EA_SED_SCRIPT2}" $f
done

Reviewers: sanjoy, deadalnix, apilipenko, anna, skatkov, mkazantsev

Reviewed By: sanjoy

Subscribers: hfinkel, jholewinski, arsenm, sdardis, nhaehnle, JDevlieghere, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D38419

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316950 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-30 19:51:48 +00:00
Eugene Zelenko
26ee77f253 [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 21:24:53 +00:00
Marek Olsak
4fda278e9b AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)
Summary:
Kill the thread if operand 0 == false.
llvm.amdgcn.wqm.vote can be applied to the operand.

Also allow kill in all shader stages.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D38544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316427 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 10:27:13 +00:00
Marek Olsak
7525c08782 AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D38543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316426 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 10:26:59 +00:00
Sanjay Patel
3cf64e346f [InstCombine] don't unnecessarily generate a constant; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315910 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-16 14:47:24 +00:00
Nikolai Bozhenov
efa58149ae Move folding of icmp with zero after checking for min/max idioms.
Summary:
The following transformation for cmp instruction:

  icmp smin(x, PositiveValue), 0 -> icmp x, 0

should only be done after checking for min/max to prevent infinite
looping caused by a reverse canonicalization. That is why this
transformation was moved to place after the mentioned check.

Reviewers: spatel, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38934

Patch by: Artur Gainullin <artur.gainullin@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315895 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-16 09:19:21 +00:00
Sanjay Patel
53bdccfd61 revert r314984: revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
Recommitting r314698. The bug exposed by this change should be fixed with:
https://reviews.llvm.org/rL315579 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315857 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-15 15:39:15 +00:00
Sanjay Patel
bfa0442391 [InstCombine] use m_Neg() to reduce code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315762 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 21:28:50 +00:00
Sanjay Patel
ab26bdd6c2 [InstCombine] move code to remove repeated constant check; NFCI
Also, consolidate tests for this fold in one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315745 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 20:29:11 +00:00
Sanjay Patel
d9a915e239 [InstCombine] recycle adds for better efficiency
Also, clean up unnecessary matcher capture variable initializations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315743 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 20:12:21 +00:00
Sanjay Patel
fb7d705a02 [InstCombine] use local var to reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315728 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 18:32:53 +00:00
Sanjay Patel
a7bbf63f80 [InstCombine] add hasOneUse check to add-zext-add fold to prevent increasing instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315718 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 17:47:25 +00:00
Sanjay Patel
963cef7a18 [InstCombine] use AddOne helper to reduce code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315709 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 17:00:47 +00:00
Sanjay Patel
b245b723b9 [InstCombine] rearrange code to remove repeated constant check; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315703 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 16:43:58 +00:00
Sanjay Patel
b22d64b7ed [InstCombine] allow zext(bool) + C --> select bool, C+1, C for vector types
The backend should be prepared for this transform after:
https://reviews.llvm.org/rL311731



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315701 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 16:29:38 +00:00
Xinliang David Li
60c5ae542c Renable r314928
Eliminate inttype phi with inttoptr/ptrtoint.

 This version fixed a bug in finding the matching
 phi -- the order of the incoming blocks may be 
 different (triggered in self build on Windows).
 A new test case is added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 05:07:54 +00:00
Adam Nemet
3b8950a6d6 Rename OptimizationDiagnosticInfo.* to OptimizationRemarkEmitter.*
Sync it up with the name of the class actually defined here.  This has been
bothering me for a while...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315249 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-09 23:19:02 +00:00
Sanjay Patel
963e18e511 [InstCombine] fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315223 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-09 17:54:46 +00:00
Sanjay Patel
1b2747a59f [InstCombine] use correct type when propagating constant condition in simplifyDivRemOfSelectWithZeroOp (PR34856)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315130 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 23:43:06 +00:00
Sanjay Patel
fa05ed8088 [InstCombine] rename SimplifyDivRemOfSelect to be clearer, add comments, simplify code; NFCI
There's at least one bug here - this code can fail with vector types (PR34856).
It's also being called for FREM; I'm still trying to understand how that is valid.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 23:20:16 +00:00
Reid Kleckner
57c865bc5d Revert "Roll forward r314928"
This appears to be miscompiling Clang, as shown on two Windows bootstrap
bots:
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7611
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/6870

Nothing else is in the blame list. Both emit errors on this valid code
in the Windows ucrt headers:

C:\...\ucrt\malloc.h:95:32: error: invalid operands to binary expression ('char *' and 'int')
            _Ptr = (char*)_Ptr + _ALLOCA_S_MARKER_SIZE;
                   ~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~

I am attempting to reproduce this now.

This reverts r315044

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315108 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 21:17:51 +00:00
Xinliang David Li
80d30e12cc Roll forward r314928
Fixed ThinLTO bootstrap failure : track new
bitcast per incomingVal. Added new tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315044 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 05:15:25 +00:00
Sanjay Patel
b1eb7bb6ec [InstCombine] improve folds for icmp gt/lt (shr X, C1), C2
We can always eliminate the shift in: icmp gt/lt (shr X, C1), C2 --> icmp gt/lt X, C'
This patch was supposed to just be an efficiency improvement because we were doing this 3-step process to fold:

IC: Visiting:   %c = icmp ugt i4 %s, 1
IC: ADD:   %s = lshr i4 %x, 1
IC: ADD:   %1 = udiv i4 %x, 2
IC: Old =   %c = icmp ugt i4 %1, 1
    New =   <badref> = icmp uge i4 %x, 4
IC: ADD:   %c = icmp uge i4 %x, 4
IC: ERASE   %2 = icmp ugt i4 %1, 1
IC: Visiting:   %c = icmp uge i4 %x, 4
IC: Old =   %c = icmp uge i4 %x, 4
    New =   <badref> = icmp ugt i4 %x, 3
IC: ADD:   %c = icmp ugt i4 %x, 3
IC: ERASE   %2 = icmp uge i4 %x, 4
IC: Visiting:   %c = icmp ugt i4 %x, 3
IC: DCE:   %1 = udiv i4 %x, 2
IC: ERASE   %1 = udiv i4 %x, 2
IC: DCE:   %s = lshr i4 %x, 1
IC: ERASE   %s = lshr i4 %x, 1
IC: Visiting:   ret i1 %c

When we could go directly to canonical icmp form:

IC: Visiting:   %c = icmp ugt i4 %s, 1
IC: Old =   %c = icmp ugt i4 %s, 1
    New =   <badref> = icmp ugt i4 %x, 3
IC: ADD:   %c = icmp ugt i4 %x, 3
IC: ERASE   %1 = icmp ugt i4 %s, 1
IC: ADD:   %s = lshr i4 %x, 1
IC: DCE:   %s = lshr i4 %x, 1
IC: ERASE   %s = lshr i4 %x, 1
IC: Visiting:   %c = icmp ugt i4 %x, 3

...but then I noticed that the folds were incomplete too:
https://godbolt.org/g/aB2hLE

Here are attempts to prove the logic with Alive:
https://rise4fun.com/Alive/92o

Name: lshr_ult
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr i8 %x, C1
%r = icmp ult i8 %sh, C2
  =>
%r = icmp ult i8 %x, (C2 << C1)

Name: ashr_slt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr i8 %x, C1
%r = icmp slt i8 %sh, C2
  =>
%r = icmp slt i8 %x, (C2 << C1)

Name: lshr_ugt
Pre: (((C2+1) << C1) u>> C1) == (C2+1)
%sh = lshr i8 %x, C1
%r = icmp ugt i8 %sh, C2
  =>
%r = icmp ugt i8 %x, ((C2+1) << C1) - 1

Name: ashr_sgt
Pre: (C2 != 127) && ((C2+1) << C1 != -128) && (((C2+1) << C1) >> C1) == (C2+1)
%sh = ashr i8 %x, C1
%r = icmp sgt i8 %sh, C2
  =>
%r = icmp sgt i8 %x, ((C2+1) << C1) - 1

Name: ashr_exact_sgt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr exact i8 %x, C1
%r = icmp sgt i8 %sh, C2
  =>
%r = icmp sgt i8 %x, (C2 << C1)

Name: ashr_exact_slt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr exact i8 %x, C1
%r = icmp slt i8 %sh, C2
  =>
%r = icmp slt i8 %x, (C2 << C1)

Name: lshr_exact_ugt
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr exact i8 %x, C1
%r = icmp ugt i8 %sh, C2
  =>
%r = icmp ugt i8 %x, (C2 << C1)

Name: lshr_exact_ult
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr exact i8 %x, C1
%r = icmp ult i8 %sh, C2
  =>
%r = icmp ult i8 %x, (C2 << C1)

We did something similar for 'shl' in D28406.

Differential Revision: https://reviews.llvm.org/D38514




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 21:11:49 +00:00
Sanjay Patel
895743db76 revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
There is a bot failure that appears to be related to this change:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/2117

...so reverting to confirm that and attempting to keep the bot green while investigating.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314984 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 14:26:15 +00:00
Craig Topper
8114ee377b [InstCombine] Fix a vector splat handling bug in transformZExtICmp.
We were using an i1 type and then zero extending to a vector. Instead just create the 0/1 directly as a ConstantInt with the correct type. No need to ask ConstantExpr to zero extend for us.

This bug is a bit tricky to hit because it requires us to visit a zext of an icmp that would normally be simplified to true/false, but that icmp hasnt' been visited yet. In the test case this zext and icmp were created by visiting a udiv and due to worklist ordering we got to the zext first.

Fixes PR34841.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314971 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 07:59:11 +00:00
Xinliang David Li
cd539c40a9 Revert r314928 to investigate thinLTO bootstrap failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314961 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 01:40:13 +00:00
Craig Topper
e86553295b [InstCombine] Improve support for ashr in foldICmpAndShift
We can support ashr similar to lshr, if we know that none of the shifted in bits are used. In that case SimplifyDemandedBits would normally convert it to lshr. But that conversion doesn't happen if the shift has additional users.

Differential Revision: https://reviews.llvm.org/D38521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314945 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 23:06:13 +00:00
Xinliang David Li
2ba1670f7b Recommit r314561 after fixing msan build failure
(trial 2) Incoming val defined by terminator instruction which
also requires bitcasts can not be handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314928 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 20:17:55 +00:00
Craig Topper
b11d8d7e5f [InstCombine] Use isSignBitCheck to simplify an if statement. Directly create new sign bit compares instead of manipulating the constant. NFCI
Since we no longer had the direct constant compares, manipulating the constant seemeded less clear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314830 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 19:14:23 +00:00
Craig Topper
42d7f5ca74 [InstCombine] Change a bunch of methods to take APInts by reference instead of pointer.
This allows us to remove a bunch of dereferences and only have a few dereferences at the call sites.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314762 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 05:31:07 +00:00
Craig Topper
ca4640c46a [InstCombine] Replace an equality compare of two APInt pointers with a compare of the APInts themselves.
Apparently this works by virtue of the fact that the pointers are pointers to the APInts stored inside of the ConstantInt objects. But I really don't think we should be relying on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314761 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 04:55:04 +00:00
Sanjay Patel
fc20547ae6 [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314698 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 18:26:44 +00:00
Dehao Chen
50b210a97a Update getMergedLocation to check the instruction type and merge properly.
Summary: If the merged instruction is call instruction, we need to set the scope to the closes common scope between 2 locations, otherwise it will cause trouble when the call is getting inlined.

Reviewers: dblaikie, aprantl

Reviewed By: dblaikie, aprantl

Subscribers: llvm-commits, sanjoy

Differential Revision: https://reviews.llvm.org/D37877

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314694 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 18:13:14 +00:00
Craig Topper
ecaac1300e [InstCombine] Use APInt for all the math in foldICmpDivConstant
Summary: This currently uses ConstantExpr to do its math, but as noted in a TODO it can all be done directly on APInt.

Reviewers: spatel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314640 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-01 23:53:54 +00:00
Daniel Jasper
ba1d57e4a9 Revert r314579: "Recommi r314561 after fixing over-debug assertion".
And follow-up r314585.
Leads to segfaults. I'll forward reproduction instructions to the patch
author.

Also, for a recommit, still add the original patch description.
Otherwise, it becomes really tedious to find out what a patch actually
does. The fact that it is a recommit with a fix is somewhat secondary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314622 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-01 09:53:53 +00:00