Commit Graph

2 Commits

Author SHA1 Message Date
Daniel Berlin
6ac1ea33ad Remove unneeded else from OrderedInstructions::dominates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306701 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-29 17:01:03 +00:00
Xin Tong
801b4cef3c Add a dominanance check interface that uses caching for instructions within same basic block.
Summary:
This problem stems from the fact that instructions are allocated using new
in LLVM, i.e. there is no relationship that can be derived by just looking
at the pointer value.

This interface dispatches to appropriate dominance check given 2 instructions,
i.e. in case the instructions are in the same basic block, ordered basicblock
(with instruction numbering and caching) are used. Otherwise, dominator tree
is used.

This is a preparation patch for https://reviews.llvm.org/D32720

Reviewers: dberlin, hfinkel, davide

Subscribers: davide, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D33380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304764 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 02:34:41 +00:00