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53 Commits

Author SHA1 Message Date
Christopher Lamb
8b165731bc Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41005 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:11:55 +00:00
Christopher Lamb
98363225a3 Implement review feedback. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06 16:33:56 +00:00
Christopher Lamb
bab2474b64 Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 08:18:32 +00:00
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