It looks like there are two target-independent but not GISel instructions that
need legalization, IMPLICIT_DEF and PHI. These are already anomalies since
their operands have important LLTs attached, so to make things more uniform it
seems like a good idea to add generic variants. Starting with G_IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306875 91177308-0d34-0410-b5e6-96231b3b80d8
It was trying to do too many things. The basic lumping together of values for
legalization purposes is now handled by G_MERGE_VALUES. More complex things
involving gaps and odd sizes are handled by G_INSERT sequences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306120 91177308-0d34-0410-b5e6-96231b3b80d8
A bit more painful than G_INSERT because it was more widely used, but this
should simplify the handling of extract operations in most locations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297100 91177308-0d34-0410-b5e6-96231b3b80d8
It's much easier to reason about single-value inserts and no-one was actually
using the variadic variants before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296923 91177308-0d34-0410-b5e6-96231b3b80d8
These are simplified variants of the current G_SEQUENCE and G_EXTRACT, which
assume the individual parts will be contiguous, homogeneous, and occupy the
entirity of the larger register. This makes reasoning about them much easer
since you only have to look at the first register being merged and the result
to know what the instruction is doing.
I intend to gradually replace all uses of the more complicated sequence/extract
with these (or single-element insert/extracts), and then remove the older
variants. For now we start with legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296921 91177308-0d34-0410-b5e6-96231b3b80d8
Since (say) i128 and [16 x i8] map to the same type in generic MIR, we also
need to attach the required alignment info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295254 91177308-0d34-0410-b5e6-96231b3b80d8
This instruction clears the low bits of a pointer without requiring (possibly
dodgy if pointers aren't ints) conversions to and from an integer. Since (as
far as I'm aware) all masks are statically known, the instruction takes an
immediate operand rather than a register to specify the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295103 91177308-0d34-0410-b5e6-96231b3b80d8
It'll usually be immediately legalized back to a libcall, but occasionally
something can be done with it so we'd just as well enable that flexibility from
the start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294530 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64 has specific instructions to multiply two numbers at double the width
and produce the high part of the result. These can be used to implement LLVM's
mul.with.overflow instructions fairly simply. Helps with C++ operator new[].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294519 91177308-0d34-0410-b5e6-96231b3b80d8
Because we need to preserve the memory access being performed we need a
separate instruction to represent this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294492 91177308-0d34-0410-b5e6-96231b3b80d8
Unlike SDag, we use a separate G_GEP instruction (much simplified, only taking
a single byte offset) to preserve the pointer type information through
selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281205 91177308-0d34-0410-b5e6-96231b3b80d8
These instructions were only necessary when type information was stored in the
MachineInstr (because only generic MachineInstrs possessed a type). Now that
it's in MachineRegisterInfo, COPY and PHI work fine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281037 91177308-0d34-0410-b5e6-96231b3b80d8
We want each register to have a canonical type, which means the best place to
store this is in MachineRegisterInfo rather than on every MachineInstr that
happens to use or define that register.
Most changes following from this are pretty simple (you need an MRI anyway if
you're going to be doing any transformations, so just check the type there).
But legalization doesn't really want to check redundant operands (when, for
example, a G_ADD only ever has one type) so I've made use of MCInstrDesc's
operand type field to encode these constraints and limit legalization's work.
As an added bonus, more validation is possible, both in MachineVerifier and
MachineIRBuilder (coming soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281035 91177308-0d34-0410-b5e6-96231b3b80d8
They're another source of generic vregs, which are going to need a type on the
definition when we remove the register width from MachineRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280412 91177308-0d34-0410-b5e6-96231b3b80d8
More preparation for dropping source types from MachineInstrs: regsters coming
out of already-selected code (i.e. non-generic instructions) don't have a type,
but that information is needed so we must add it manually.
This is done via a new G_TYPE instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280292 91177308-0d34-0410-b5e6-96231b3b80d8
They really should have both types represented, but early variants were created
before MachineInstrs could have multiple types so they're rather ambiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279567 91177308-0d34-0410-b5e6-96231b3b80d8
This adds a G_INSERT instruction, which technically makes G_SEQUENCE redundant
(it's equivalent to a G_INSERT into an IMPLICIT_DEF). We'll leave G_SEQUENCE
for now though: it's likely to be far more common as it's a fundamental part of
legalization, so avoiding the mess and bloat of the extra IMPLICIT_DEFs is
probably worthwhile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279306 91177308-0d34-0410-b5e6-96231b3b80d8
Unsigned addition and subtraction can reuse the instructions created to
legalize large width operations (i.e. both produce and consume a carry flag).
Signed operations and multiplies get a dedicated op-with-overflow instruction.
Once this is produced the two values are combined into a struct register (which
will almost always be merged with a corresponding G_EXTRACT as part of
legalization).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279278 91177308-0d34-0410-b5e6-96231b3b80d8
These come in two variants for now: G_INTRINSIC and G_INTRINSIC_W_SIDE_EFFECTS.
We may decide to split the latter up with finer-grained restrictions later, if
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277224 91177308-0d34-0410-b5e6-96231b3b80d8
Just the basic equivalent to DAG's condbr for now, we'll get to things like
br_cc when we start doing more legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277184 91177308-0d34-0410-b5e6-96231b3b80d8
The instance in the input operand list allows both inputs and outputs,
but the one in (outs) is not treated specially which leads to the
MachineVerifier invoking UB (looking at an invalid MCInstrDesc field).
No functional change except in UBSan builds (maybe, who knows!), where
it fixes the legalize-add.mir test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276872 91177308-0d34-0410-b5e6-96231b3b80d8
Pretty straightforward, the only oddity is the MachineMemOperand (which it's
surprisingly difficult to share code for).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276799 91177308-0d34-0410-b5e6-96231b3b80d8
This adds LLVM's 3 main cast instructions (inttoptr, ptrtoint, bitcast) to the
IRTranslator. The first two are direct translations (with 2 MachineInstr types
each). Since LLT discards information, a bitcast might become trivial and we
emit a COPY in those cases instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276690 91177308-0d34-0410-b5e6-96231b3b80d8
