Commit Graph

26 Commits

Author SHA1 Message Date
Alex Bradbury
a1c2bb91ad [RISCV] Add support for disassembly
This Disassembly support allows for 'round-trip' testing, and rv32i-valid.s
has been updated appropriately.

Differential Revision: https://reviews.llvm.org/D23567


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313486 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-17 14:36:28 +00:00
Alex Bradbury
26132ea8ed [RISCV] Add support for all RV32I instructions
This patch supports all RV32I instructions as described in the RISC-V manual.
A future patch will add support for pseudoinstructions and other instruction
expansions (e.g. 0-arg fence -> fence iorw, iorw).

Differential Revision: https://reviews.llvm.org/D23566


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313485 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-17 14:27:35 +00:00
Alex Bradbury
4f2535a46c [RISCV][NFC] Fix sorting of includes in lib/Target/RISCV
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312624 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-06 09:21:21 +00:00
Alex Bradbury
6e8164d525 [RISCV] Trivial whitespace fix in RISCVInstPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:58:43 +00:00
Alex Bradbury
5f1fa48a24 [RISCV] Fix two abuses of llvm_unreachable
Replace with report_fatal_error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311276 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:57:27 +00:00
Alex Bradbury
cc0899c732 [RISCV] Set HasRelocationAddend for RISCVELFObjectWriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311275 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 06:55:14 +00:00
Alex Bradbury
1de4891dd5 [RISCV] Add RISCVInstPrinter and basic MC assembler tests
With the addition of RISCVInstPrinter, it is now possible to test the basic 
operation of the RISCV MC layer.

Differential Revision: https://reviews.llvm.org/D23564


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310917 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-15 13:08:29 +00:00
Alex Bradbury
b22eff0ff6 [RISCV] Fix warning about unused getSubtargetFeatureName()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310375 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 16:20:39 +00:00
Alex Bradbury
8566fbfb25 [RISCV] Add basic RISCVAsmParser (missing files)
This commit adds the files missing from rL310361. Apologies for the noise.

Differential Revision: https://reviews.llvm.org/D23563


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310363 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 14:43:36 +00:00
Alex Bradbury
f869506955 [RISCV] Add basic RISCVAsmParser
This doesn't yet support parsing things like %pcrel_hi(foo), but will handle
basic instructions with register or immediate operands.

Differential Revision: https://reviews.llvm.org/D23563


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310361 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 14:32:35 +00:00
Rafael Espindola
9aafb854cc Delete Default and JITDefault code models
IMHO it is an antipattern to have a enum value that is Default.

At any given piece of code it is not clear if we have to handle
Default or if has already been mapped to a concrete value. In this
case in particular, only the target can do the mapping and it is nice
to make sure it is always done.

This deletes the two default enum values of CodeModel and uses an
explicit Optional<CodeModel> when it is possible that it is
unspecified.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309911 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-03 02:16:21 +00:00
Rafael Espindola
4aebf83110 Fully fix the movw/movt addend.
The issue is not if the value is pcrel. It is whether we have a
relocation or not.

If we have a relocation, the static linker will select the upper
bits. If we don't have a relocation, we have to do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307730 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-11 23:18:25 +00:00
Rafael Espindola
bfb1e6dd81 Remove redundant argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306189 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-24 00:26:57 +00:00
Rafael Espindola
3d8b65f712 ARM: move some logic from processFixupValue to applyFixup.
processFixupValue is called on every relaxation iteration. applyFixup
is only called once at the very end. applyFixup is then the correct
place to do last minute changes and value checks.

While here, do proper range checks again for fixup_arm_thumb_bl. We
used to do it, but dropped because of thumb2. We now do it again, but
use the thumb2 range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306177 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-23 22:52:36 +00:00
Rafael Espindola
bb561ec060 Use a MutableArrayRef. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305968 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 23:06:53 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Matthias Braun
7d0dde023f TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFC
TargetPassConfig is not useful for targets that do not use the CodeGen
library, so we may just as well store a pointer to an
LLVMTargetMachine instead of just to a TargetMachine.

While at it, also change the constructor to take a reference instead of a
pointer as the TM must not be nullptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304247 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-30 21:36:41 +00:00
Konstantin Zhuravlyov
0c79d1f4e0 Distinguish between code pointer size and DataLayout::getPointerSize() in DWARF info generation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300463 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-17 17:41:25 +00:00
Alex Bradbury
ff1254b6f8 Add MCContext argument to MCAsmBackend::applyFixup for error reporting
A number of backends (AArch64, MIPS, ARM) have been using
MCContext::reportError to report issues such as out-of-range fixup values in
their TgtAsmBackend. This is great, but because MCContext couldn't easily be
threaded through to the adjustFixupValue helper function from its usual
callsite (applyFixup), these backends ended up adding an MCContext* argument
and adding another call to applyFixup to processFixupValue. Adding an
MCContext parameter to applyFixup makes this unnecessary, and even better -
applyFixup can take a reference to MCContext rather than a potentially null
pointer.

Differential Revision: https://reviews.llvm.org/D30264


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299529 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-05 10:16:14 +00:00
Alex Bradbury
6eaf72c16b [RISCV] Fix RV32 datalayout string and ensure initAsmInfo is called
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-14 05:20:20 +00:00
Alex Bradbury
0f17e9df2d [RISCV] Pseudo instructions are isCodeGenOnly, have blank asmstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-14 05:17:23 +00:00
Alex Bradbury
81a8ce81a8 [RISCV] Fix unused variable in RISCVMCTargetDesc. NFC
Also, for better uniformity use TargetRegistry::RegisterMCAsmInfo rather than 
RegisterMCAsmInfoFn. Again, no functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-14 05:15:24 +00:00
Aaron Ballman
41b84edffa Removing a switch statement that contains a default label, but no case labels. Silences an MSVC warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285806 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-02 13:58:57 +00:00
Alex Bradbury
5ded6ebfad [RISCV] Add bare-bones RISC-V MCTargetDesc
This is enough to compile and link but doesn't yet do anything particularly 
useful. Once an ASM parser and printer are added in the next two patches, the 
whole thing can be usefully tested.

Differential Revision: https://reviews.llvm.org/D23562


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285770 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-01 23:47:30 +00:00
Alex Bradbury
72d5de4e70 [RISCV 4/10] Add basic RISCV{InstrFormats,InstrInfo,RegisterInfo,}.td
For now, only add instruction definitions for basic ALU operations. Our 
initial target is a working MC layer rather than codegen, so appropriate 
SelectionDAG patterns will come later.

Differential Revision: https://reviews.llvm.org/D23561


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285769 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-01 23:40:28 +00:00
Alex Bradbury
0ba26af40d [RISCV] Add stub backend
This contains just enough for lib/Target/RISCV to compile. Notably a basic 
RISCVTargetMachine and RISCVTargetInfo. At this point you can attempt llc 
-march=riscv32 myinput.ll and will find it fails due to the lack of 
MCAsmInfo.

See http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html for 
further discussion

Differential Revision: https://reviews.llvm.org/D23560


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285712 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-01 17:27:54 +00:00