Commit Graph

23 Commits

Author SHA1 Message Date
Mark Searles
b30a83dec3 [AMDGPU] Waitcnt pass: Modify the waitcnt pass to propagate info in the case of a single basic block loop. mergeInputScoreBrackets() does this for us; update it so that it processes the single bb's score bracket when processing the single bb's preds. It is, after all, a pred of itself, so it's score bracket is needed.
Differential Revision: https://reviews.llvm.org/D44434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327583 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 22:04:32 +00:00
Mark Searles
04c7451aa8 [AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325524 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-19 19:19:59 +00:00
Stanislav Mekhanoshin
ee1ab18539 [AMDGPU] Combine adjacent waitcounts in a single strongest wait
Differential Revision: https://reviews.llvm.org/D43350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325299 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-15 22:03:55 +00:00
Stanislav Mekhanoshin
84f9e04139 [AMDGPU] Fixed wait count reuse
The code reusing existing wait counts is incorrect since it keeps
adding new operands to an old instruction instead of replacing
the immediate. It was also effectively switched off by the condition
that wait count is not an AMDGPU::S_WAITCNT.

Also switched to BuildMI instead of creating instructions directly.

Differential Revision: https://reviews.llvm.org/D42997

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324547 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 00:18:35 +00:00
Mark Searles
4fe7c58adf [AMDGPU] Suppress redundant waitcnt instrs.
1. Run the memory legalizer prior to the waitcnt pass; keep the policy that the waitcnt pass does not remove any waitcnts within the incoming IR.

2. The waitcnt pass doesn't (yet) track waitcnts that exist prior to the waitcnt pass (it just skips over them); because the waitcnt pass is ignorant of them, it may insert a redundant waitcnt. To avoid this, check the prev instr. If it and the to-be-inserted waitcnt are the same, suppress the insertion. We keep the existing waitcnt under the assumption that whomever, e.g., the memory legalizer, inserted it knows what they were doing.

3. Follow-on work: teach the waitcnt pass to record the pre-existing waitcnts for better waitcnt production.

Differential Revision: https://reviews.llvm.org/D42854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324440 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-07 02:21:21 +00:00
Mark Searles
505994887d [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output."
Patch caused a buildbot failure; arg; http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/17373/s\
teps/build_Lld/logs/stdio :
        /Users/buildslave/as-bldslv9/lld-x86_64-darwin13/llvm.src/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1563:18: error: unused variable 'InstCnt' [-Werror,-Wunused-variable]
          static int32_t InstCnt = 0;
                                              "
This reverts commit 4f4a7d61e306b67044d9f16bc2016fee806bc2cc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323791 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-30 17:17:06 +00:00
Mark Searles
5b32b73115 [AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output.
-amdgpu-waitcnt-forcezero={1|0}  Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-amdgpu-waitcnt-forceexp=<n>  Force emit a s_waitcnt expcnt(0) before the first <n> instrs
-amdgpu-waitcnt-forcelgkm=<n> Force emit a s_waitcnt lgkmcnt(0) before the first <n> instrs
-amdgpu-waitcnt-forcevm=<n>   Force emit a s_waitcnt vmcnt(0) before the first <n> instrs

This patch was pushed ( abb190fd51cd2f9a9eef08c024e109f7f7e909fc ), which caused a buildbot failure, reverted ( 6227480d74da507cf8e1b4bcaffbdb9fb875b4b8 ), and then updated to fix buildbot failures (this patch).

Differential Revision: https://reviews.llvm.org/D40091

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323788 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-30 16:49:38 +00:00
Hiroshi Inoue
d1b456b6d1 [NFC] fix trivial typos in comments and documents
"to to" -> "to"



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323628 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-29 05:17:03 +00:00
Mark Searles
82e0652b95 [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output."
Patch caused a buildbot failure; http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/15733/steps/build_Lld/logs/stdio :
lib/Target/AMDGPU/SIInsertWaitcnts.cpp:396:11: error: private field 'InstCnt' is not used [-Werror,-Wunused-private-field]
  int32_t InstCnt = 0;
          ^
1 error generated.
"
This reverts commit 71627f7901.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320086 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-07 21:14:41 +00:00
Mark Searles
71627f7901 [AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output.
-amdgpu-waitcnt-forcezero={1|0}  Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-amdgpu-waitcnt-forceexp=<n>  Force emit a s_waitcnt expcnt(0) before the first <n> instrs
-amdgpu-waitcnt-forcelgkm=<n> Force emit a s_waitcnt lgkmcnt(0) before the first <n> instrs
-amdgpu-waitcnt-forcevm=<n>   Force emit a s_waitcnt vmcnt(0) before the first <n> instrs

Differential Revision: https://reviews.llvm.org/D40091

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320084 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-07 20:36:39 +00:00
Tim Corringham
1e6aa1171d AMDGPU: fix missing s_waitcnt
Summary:
The pass that inserts s_waitcnt instructions where needed propagated
info used to track dependencies for each block by iterating over the
predecessor blocks. The iteration was terminated when a predecessor
that had not yet been processed was encountered. Any info in blocks
later in the list was therefore not processed, leading to the
possiblility of a required s_waitcnt not being inserted.

The fix is simply to change the "break" to "continue" for the
relevant loops, so that all visited blocks are processed. This
is likely what was intended when the code was written.

There is no test case provided for this fix because:
1) the only example that reproduces this is large and resistant to
being reduced
2) the change is trivial

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D40544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319651 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 12:30:49 +00:00
Matt Arsenault
9f8c0170e6 AMDGPU: Move hazard avoidance out of waitcnt pass.
This is mostly moving VMEM clause breaking into
the hazard recognizer. Also move another hazard
currently handled in the waitcnt pass.

Also stops breaking clauses unless xnack is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318557 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-17 21:35:32 +00:00
NAKAMURA Takumi
598658d792 Fix warnings discovered by rL317076. [-Wunused-private-field]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317091 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-01 13:47:55 +00:00
Evgeny Mankov
cb139f4145 [AMDGPU] NFC: test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-16 16:47:29 +00:00
Eugene Zelenko
5ca94f31ee [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310328 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 00:47:13 +00:00
Matt Arsenault
3ff37decad AMDGPU: Partially fix improper reliance on memoperands
There are 2 more places doing this, but I'm not sure
what they are doing and don't make any sense to me

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308770 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-21 18:54:54 +00:00
Matt Arsenault
ecba33a1f4 AMDGPU: Don't track lgkmcnt for global_/scratch_ instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308766 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-21 18:34:51 +00:00
Mark Searles
cc713d1bdd [AMDGPU] Fix uninit'ed var (RevisitLoop)
Differential Revision: https://reviews.llvm.org/D33907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304729 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 19:29:01 +00:00
Konstantin Zhuravlyov
e0fcf72467 AMDGPU: Make auto waitcnt before barrier a feature
Differential Revision: https://reviews.llvm.org/D33793


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304571 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-02 17:40:26 +00:00
Mark Searles
fa784827e1 [AMDGPU] Fix bugs in new waitcnt pass. Add test.
- new waitcnt pass remains off by default; -enable-si-insert-waitcnts=1 to enable it
- fix handling of PERMUTE ops
- fix insertion of waitcnt instrs at function begin/end ( port of analogous code that was added to old waitcnt pass )
- add new test

  Differential Revision: https://reviews.llvm.org/D33114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304311 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-31 16:44:23 +00:00
Kannan Narayanan
96d48fac54 [AMDGPU] In the new waitcnt insertion pass, use getHeader
instead of getTopBlock to find the loop header.

Differential Revision: https://reviews.llvm.org/D32831



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302290 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 21:10:17 +00:00
Krzysztof Parzyszek
36d7c2b2e5 Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
   - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
   - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
   - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;

This will allow making those values depend on subtarget features in the
future.

Differential Revision: https://reviews.llvm.org/D31783


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-24 18:55:33 +00:00
Kannan Narayanan
d3302ddc52 [AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.
Based on comments in https://reviews.llvm.org/D31161.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300023 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 03:25:12 +00:00