Commit Graph

24228 Commits

Author SHA1 Message Date
Jonas Devlieghere
a8b19e082c [dsymutil] Rename llvm-dsymutil -> dsymutil
Now that almost all functionality of Apple's dsymutil has been
upstreamed, the open source variant can be used as a drop in
replacement. Hence we feel it's no longer necessary to have the llvm
prefix.

Differential revision: https://reviews.llvm.org/D44527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327790 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-18 11:38:41 +00:00
Nirav Dave
f35e82f91d Revert "[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172""
as it times out building test-suite on PPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327778 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-17 19:24:54 +00:00
Nirav Dave
f79c73681d [DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
Reland ISel cycle checking improvements after simplifying and reducing
node id invariant traversal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327777 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-17 17:42:10 +00:00
Oren Ben Simhon
10c992c085 [X86] Added support for nocf_check attribute for indirect Branch Tracking
X86 Supports Indirect Branch Tracking (IBT) as part of Control-Flow Enforcement Technology (CET).
IBT instruments ENDBR instructions used to specify valid targets of indirect call / jmp.
The `nocf_check` attribute has two roles in the context of X86 IBT technology:
	1. Appertains to a function - do not add ENDBR instruction at the beginning of the function.
	2. Appertains to a function pointer - do not track the target function of this pointer by adding nocf_check prefix to the indirect-call instruction.

This patch implements `nocf_check` context for Indirect Branch Tracking.
It also auto generates `nocf_check` prefixes before indirect branchs to jump tables that are guarded by range checks.

Differential Revision: https://reviews.llvm.org/D41879

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327767 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-17 13:29:46 +00:00
Jonas Paulsson
eb9d4e05e6 [SelectionDAG] Handle big endian target BITCAST in computeKnownBits()
The BITCAST handling in computeKnownBits() previously only worked for little
endian.

This patch reverses the iteration over elements for a big endian target which
allows this to work in this case also.

SystemZ test case.

Review: Eli Friedman
https://reviews.llvm.org/D44249

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327764 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-17 08:04:00 +00:00
David L Kreitzer
447a9343fc Quiet unused variable warnings. NFC.
Differential revision: https://reviews.llvm.org/D44583


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327745 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-16 21:21:23 +00:00
Reid Kleckner
f6f2e19681 Revert r327721 "This patch fixes the invalid usage of OptSize in Machine Combiner."
It causes asserts when compiling Chromium on Win32 with optimizations.
We compile many things with -Os.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327733 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-16 20:11:55 +00:00
Andrew V. Tischenko
11f5adb29b This patch fixes the invalid usage of OptSize in Machine Combiner.
Differential Revision: https://reviews.llvm.org/D43813


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327721 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-16 16:06:24 +00:00
Craig Topper
fdfe3c24c8 [SelectionDAG][ARM][X86] Teach PromoteIntRes_SETCC to do a better job picking the result type for the setcc.
Previously if getSetccResultType returned an illegal type we just fell back to using the default promoted type. This appears to have been to handle the case where for vectors getSetccResultType returns the input type, but the input type itself isn't legal and will need to be promoted. Without the legality check we would never reach a legal type.

But just picking the promoted type to be the setcc type can create strange setccs where the result type is 128 bits and the operand type is 256 bits. If for example the result type was promoted to v8i16 from v8i1, but the input type was promoted from v8i23 to v8i32. We currently handle this with custom lowering code in X86.

This legality check also caused us reject the getSetccResultType when the input type needed to be widened or split. Even though that result wouldn't have caused legalization to get stuck.

This patch tries to fix this by detecting the getSetccResultType needs to be promoted. If its input type also needs to be promoted we'll try a ask for a new setcc result type based on its eventual promoted value. Otherwise we fall back to default type to promote to.

For any other illegal values we might get back from the initial call to getSetccResultType we just keep and allow it to be re-legalized later via splitting or widening or scalarizing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327683 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 23:04:11 +00:00
Derek Schuff
1695e783fb [WebAssembly] Add DebugLoc information to WebAssembly block and loop.
Patch by Yury Delendik
Differential Revision: https://reviews.llvm.org/D44448

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327673 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 22:06:51 +00:00
Reid Kleckner
58e2c599eb Re-land r327620 "[CodeView] Initial support for emitting S_BLOCK32 symbols for lexical scopes"
This is safe to land now that we don't copy FunctionInfo when rehashing
the DenseMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327670 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 21:24:04 +00:00
Reid Kleckner
80c8314331 [codeview] Fix sense of the assertion about hashtable insertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327669 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 21:18:42 +00:00
Reid Kleckner
44bbb4a2f3 [codeview] Delete FunctionInfo copy ctor and move out of DenseMap
We were unnecessarily copying a bunch of these FunctionInfo objects
around when rehashing the DenseMap.

Furthermore, r327620 introduced pointers referring to objects owned by
FunctionInfo, and the default copy ctor did the wrong thing in this
case, leading to use-after-free when the DenseMap gets rehashed.

I will rebase r327620 on this next and recommit it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327665 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 21:12:21 +00:00
Reid Kleckner
319ecd75bd Revert r327620 "[CodeView] Initial support for emitting S_BLOCK32 symbols for lexical scopes"
It is causing crashes when compiling Chrome in debug mode.

I'll try to debug it in a second.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327657 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 20:12:16 +00:00
Brock Wyma
bb3e2694e9 [CodeView] Initial support for emitting S_BLOCK32 symbols for lexical scopes
This patch sorts local variables by lexical scope and emits them inside
an appropriate S_BLOCK32 CodeView symbol.

Differential Revision: https://reviews.llvm.org/D42926



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327620 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-15 11:52:17 +00:00
Reid Kleckner
4d4a317f80 [FastISel] Sink local value materializations to first use
Summary:
Local values are constants, global addresses, and stack addresses that
can't be folded into the instruction that uses them. For example, when
storing the address of a global variable into memory, we need to
materialize that address into a register.

FastISel doesn't want to materialize any given local value more than
once, so it generates all local value materialization code at
EmitStartPt, which always dominates the current insertion point. This
allows it to maintain a map of local value registers, and it knows that
the local value area will always dominate the current insertion point.

The downside is that local value instructions are always emitted without
a source location. This is done to prevent jumpy line tables, but it
means that the local value area will be considered part of the previous
statement. Consider this C code:
  call1();      // line 1
  ++global;     // line 2
  ++global;     // line 3
  call2(&global, &local); // line 4

Today we end up with assembly and line tables like this:
  .loc 1 1
  callq call1
  leaq global(%rip), %rdi
  leaq local(%rsp), %rsi
  .loc 1 2
  addq $1, global(%rip)
  .loc 1 3
  addq $1, global(%rip)
  .loc 1 4
  callq call2

The LEA instructions in the local value area have no source location and
are treated as being on line 1. Stepping through the code in a debugger
and correlating it with the assembly won't make much sense, because
these materializations are only required for line 4.

This is actually problematic for the VS debugger "set next statement"
feature, which effectively assumes that there are no registers live
across statement boundaries. By sinking the local value code into the
statement and fixing up the source location, we can make that feature
work. This was filed as https://bugs.llvm.org/show_bug.cgi?id=35975 and
https://crbug.com/793819.

This change is obviously not enough to make this feature work reliably
in all cases, but I felt that it was worth doing anyway because it
usually generates smaller, more comprehensible -O0 code. I measured a
0.12% regression in code generation time with LLC on the sqlite3
amalgamation, so I think this is worth doing.

There are some special cases worth calling out in the commit message:
1. local values materialized for phis
2. local values used by no-op casts
3. dead local value code

Local values can be materialized for phis, and this does not show up as
a vreg use in MachineRegisterInfo. In this case, if there are no other
uses, this patch sinks the value to the first terminator, EH label, or
the end of the BB if nothing else exists.

Local values may also be used by no-op casts, which adds the register to
the RegFixups table. Without reversing the RegFixups map direction, we
don't have enough information to sink these instructions.

Lastly, if the local value register has no other uses, we can delete it.
This comes up when fastisel tries two instruction selection approaches
and the first materializes the value but fails and the second succeeds
without using the local value.

Reviewers: aprantl, dblaikie, qcolombet, MatzeB, vsk, echristo

Subscribers: dotdash, chandlerc, hans, sdardis, amccarth, javed.absar, zturner, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D43093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327581 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 21:54:21 +00:00
Francis Visoiu Mistrih
0d758f3663 [CodeGen] Use MIR syntax for MachineMemOperand printing
Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)".

rdar://38163529

Differential Revision: https://reviews.llvm.org/D42377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327580 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 21:52:13 +00:00
Francis Visoiu Mistrih
b34a8c964f [AArch64] Keep track of MIFlags in the LoadStoreOptimizer
Merging:

* $x26, $x25 = frame-setup LDPXi $sp, 0
* $sp = frame-destroy ADDXri $sp, 64, 0

into an LDPXpost should preserve the flags from both instructions as
following:

* frame-setup frame-destroy LDPXpost

Differential Revision: https://reviews.llvm.org/D44446

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327533 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 17:10:58 +00:00
Craig Topper
3a48b7c274 [X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
I had to modify the bswap recognition to allow unshrunk masks to make this work.

Fixes PR36689.

Differential Revision: https://reviews.llvm.org/D44442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327530 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 16:55:15 +00:00
Arnold Schwaighofer
1fd0177abc SjLjEHPrepare: Don't reg-to-mem swifterror values
swifterror llvm values model the swifterror register as memory at the
LLVM IR level. ISel will perform adhoc mem-to-reg on them. swifterror
values are constraint in how they can be used. Spilling them to memory
is not allowed.

SjLjEHPrepare tried to lower swifterror values to memory which is
unecessary since the back-end will spill and reload the register as
neccessary (as long as clobbering calls are marked as such which is the
case here) and further leads to invalid IR because swifterror values
can't be stored to memory.

rdar://38164004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327521 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 15:44:07 +00:00
Sanjay Patel
a816f42e4d [CodeGen] allow printing of zero latency in sched comments
I don't know how to expose this in a test. There are ARM / AArch64 
sched classes that include zero latency instructions, but I'm not 
seeing sched info printed for those targets. X86 will almost 
certainly have these soon (see PR36671), but no model has
'let Latency = 0' currently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327518 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 15:28:48 +00:00
Pavel Labath
9bb5a07f68 Fix msvc compiler error in r327498
msvc reports an "illegal indirection" error here. Attempt to appease it
with a different initialization syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327500 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 11:31:17 +00:00
Pavel Labath
9357220c93 Explicitly initialize dwarf::FormParams in DIEInteger::SizeOf
This could end up inititialized if someone called the function with a
null AsmPrinter. Right now this only happens in DIEHash unit tests,
presumably because it was hard to create an AsmPrinter in the context of
unit tests. This only worked before r327486 because those tests did not
use any dwarf forms whose size actually depended on the dwarf version
(otherwise, they would have crashed due to null dereference).

I fix the uninitialized error, by explicitly initializing FormParams to
an invalid value, which will cause getFixedFormByteSize to return None
if called with a form with version-dependent size. A more principled
solution might be to fix the DIEHash tests to always pass in a valid
AsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327498 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 11:14:43 +00:00
Pavel Labath
fa49d7da44 DWARF: Unify form size handling code
Summary:
This patch replaces the two switches which are deducing the size of
various forms with a single implementation. I have put the new
implementation into BinaryFormat, to avoid introducing dependencies
between the two independent libraries (DebugInfo and CodeGen) that need
this functionality.

Reviewers: aprantl, JDevlieghere, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44418

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327486 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 09:39:54 +00:00
Matt Arsenault
6f1d6423b3 TargetMachine: Add address space to getPointerSize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327467 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 00:36:23 +00:00
Craig Topper
0d74daca01 [DAGCombiner] Allow visitEXTRACT_SUBVECTOR to combine with BUILD_VECTORS between LegalizeVectorOps and LegalizeDAG.
BUILD_VECTORs aren't themselves legalized until LegalizeDAG so we should still be able to create an "illegal" one before that. This helps combine with BUILD_VECTORS that are introduced during LegalizeVectorOps due to unrolling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327446 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 20:36:28 +00:00
Francis Visoiu Mistrih
12d5807d03 [MIR] Allow frame-setup and frame-destroy on the same instruction
Nothing prevents us from having both frame-setup and frame-destroy on
the same instruction.

When merging:
* frame-setup OPCODE1
* frame-destroy OPCODE2
into
* frame-setup frame-destroy OPCODE3

we want to be able to print and parse both flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327442 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 19:53:16 +00:00
Simon Pilgrim
38ac5997de [DAGCombine] visitREM - Don't assume that one divrem isn't driving another
Under some circumstances the divrems won't have been combined together before getting to this code.

So replace the assertion with a if() guard to not expand to X-((X/C)*C) to give the other combine chance to happen.

Reduced from OSS-Fuzz #6883
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=6883


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327424 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 17:17:15 +00:00
Daniel Neilson
86dce8fdea [SelectionDAGBuilder] Replace deprecated calls to MemoryIntrinsic::getAlignment() (NFCI)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
SelectionDAGBuilder to cease using the old getAlignment() API of MemoryIntrinsic in favour of getting
source & dest specific alignments through the new API.

Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774,
rL324781, rL324784, rL324955, rL324960, rL325816, rL327398 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.

Reference
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327421 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 16:31:19 +00:00
Andrea Di Biagio
0718cccb58 [MC] Move the reciprocal throughput computation from TargetSchedModel to MCSchedModel.
The goal is to make the reciprocal throughput computation accessible through the
MCSchedModel interface. This is particularly important for llvm-mca because it
can only query the MCSchedModel interface.

No functional change intended.

Differential Revision: https://reviews.llvm.org/D44392


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327420 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 16:28:55 +00:00
Brock Wyma
a1604a6d98 Revert r327397 [CodeView] Omit forward references for unnamed structs and ...
This reverts commit r327397 to investigate a buildbot failure.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327414 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 15:56:20 +00:00
Andrea Di Biagio
fe3b1d2687 [MC] Move the instruction latency computation from TargetSchedModel to MCSchedModel.
The goal is to make the latency information accessible through the MCSchedModel
interface. This is particularly important for tools like llvm-mca that only have
access to the MCSchedModel API.

This partially fixes PR36676.
No functional change intended.

Differential Revision: https://reviews.llvm.org/D44383


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327406 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 15:22:13 +00:00
Brock Wyma
10ee99b9ad [CodeView] Omit forward references for unnamed structs and unions
Codeview references to unnamed structs and unions are expected to refer to the
complete type definition instead of a forward reference so Visual Studio can
resolve the type properly.

Differential Revision: https://reviews.llvm.org/D32498



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327397 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 14:14:16 +00:00
Jonas Paulsson
e7b0e8d685 [CodeGenPrepare] Respect endianness in splitMergedValStore.
splitMergedValStore will split a store into two if target prefers this, or if
-force-split-store is passed.

This patch adds the missing handling for endianness in this function along
with a test case.

Review: Eli Friedman
https://reviews.llvm.org/D44396

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327375 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 08:36:20 +00:00
Craig Topper
66a6ddceda [LegalizeTypes] In SplitVecOp_TruncateHelper, use GetSplitVector on the input instead of creating new extract_subvectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327355 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-13 01:17:40 +00:00
Bjorn Pettersson
475569518b [SelectionDAG] Improve handling of dangling debug info
Summary:
1) Make sure to discard dangling debug info if the variable (or
variable fragment) is mapped to something new before we had a
chance to resolve the dangling debug info.

2) When resolving debug info, make sure to bump the associated
SDNodeOrder to ensure that the DBG_VALUE is emitted after the
instruction that defines the value used in the DBG_VALUE.
This will avoid a debug-use before def scenario as seen in
https://bugs.llvm.org/show_bug.cgi?id=36417.

The new test case, test/DebugInfo/X86/sdag-dangling-dbgvalue.ll,
show some other limitations in how dangling debug info is
handled in the SelectionDAG. Since we currently only support
having one dangling dbg.value per Value, we will end up dropping
debug info when there are more than one variable that is described
by the same "dangling value".

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: aprantl, eraman, llvm-commits, JDevlieghere

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D44369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327303 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-12 18:02:39 +00:00
Serguei Katkov
e6bdfcf63a [CGP] Fix the remove of matched phis in complex addressing mode
When we replace the Phi we created with matched ones it is possible that
there are two identical phi nodes in IR. And matcher is smart enough to find that
new created phi matches both of them. So we try to replace our phi node with
matched ones twice and what is bad we delete our phi node twice causing a crash.

As soon as we found that we have two identical Phi nodes it makes sense to do
a clean-up and replace one phi node by other one.
The patch implements it.

Reviewers: john.brawn, reames
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43758


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327250 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-12 03:50:07 +00:00
Andrea Di Biagio
a41ced4260 [TargetSchedule] Minor refactor in computeInstrLatency. NFC
The intent of revision r300311 was to add a check for invalid scheduling class
descriptors. However, it ended up adding a redundant call in a basic block that
should not be reachable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327231 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-11 00:51:33 +00:00
Nirav Dave
87407bd576 Revert: r327172 "Correct load-op-store cycle detection analysis"
r327171 "Improve Dependency analysis when doing multi-node Instruction Selection"
        r328170 "[DAG] Enforce stricter NodeId invariant during Instruction selection"

Reverting patch as NodeId invariant change is causing pathological
increases in compile time on PPC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327197 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-10 02:16:15 +00:00
Craig Topper
2fb0fe6cdb [TwoAddressInstructionPass] Improve tryInstructionCommute of X86 FMA and vpternlog instructions
These instructions have 3 operands that can be commuted. The first commute we find may not be the best. So we should keep searching if we performed an aggressive commute. There may still be an operand that is killed or a physical register constraint that might be better.

Differential Revision: https://reviews.llvm.org/D44324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327188 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 23:36:58 +00:00
Craig Topper
346e47066f [TargetLowering] Remove redundant term in two ifs in SimplifySetCC. NFC
If we get into the right hand side of the OR, we know that isOpaque is true since the left hand size is just a check that it's false.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327179 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 22:24:12 +00:00
Nirav Dave
8fc6a5e5d1 Improve Dependency analysis when doing multi-node Instruction Selection
Relanding after fixing NodeId Invariant.

Cleanup cycle/validity checks in ISel (IsLegalToFold,
HandleMergeInputChains) and X86 (isFusableLoadOpStore). Now do a full
search for cycles / dependencies pruning the search when topological
property of NodeId allows.

As part of this propogate the NodeId-based cutoffs to narrow
hasPreprocessorHelper searches.

Reviewers: craig.topper, bogner

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D41293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327171 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 20:57:42 +00:00
Nirav Dave
0f0ed7bf93 [DAG] Enforce stricter NodeId invariant during Instruction selection
Instruction Selection makes use of the topological ordering of nodes
by node id (a node's operands have smaller node id than it) when doing
cycle detection.  During selection we may violate this property as a
selection of multiple nodes may induce a use dependence (and thus a
node id restriction) between two unrelated nodes. If a selected node
has an unselected successor this may allow us to miss a cycle in
detection an invalid selection.

This patch fixes this by marking all unselected successors of a
selected node have negated node id.  We avoid pruning on such negative
ids but still can reconstruct the original id for pruning.

In-tree targets have been updated to replace DAG-level replacements
with ISel-level ones which enforce this property.

This preemptively fixes PR36312 before triggering commit r324359 relands

Reviewers: craig.topper, bogner, jyknight

Subscribers: arsenm, nhaehnle, javed.absar, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D43198

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327170 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 20:57:15 +00:00
Nirav Dave
493154d6d0 Make early exit hasPredecessorHelper return true. NFCI.
All uses conservatively assume in early exit case that it will be a
predecessor. Changing default removes checking code in all uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327169 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 20:56:51 +00:00
Peter Collingbourne
68d73644cd Use branch funnels for virtual calls when retpoline mitigation is enabled.
The retpoline mitigation for variant 2 of CVE-2017-5715 inhibits the
branch predictor, and as a result it can lead to a measurable loss of
performance. We can reduce the performance impact of retpolined virtual
calls by replacing them with a special construct known as a branch
funnel, which is an instruction sequence that implements virtual calls
to a set of known targets using a binary tree of direct branches. This
allows the processor to speculately execute valid implementations of the
virtual function without allowing for speculative execution of of calls
to arbitrary addresses.

This patch extends the whole-program devirtualization pass to replace
certain virtual calls with calls to branch funnels, which are
represented using a new llvm.icall.jumptable intrinsic. It also extends
the LowerTypeTests pass to recognize the new intrinsic, generate code
for the branch funnels (x86_64 only for now) and lay out virtual tables
as required for each branch funnel.

The implementation supports full LTO as well as ThinLTO, and extends the
ThinLTO summary format used for whole-program devirtualization to
support branch funnels.

For more details see RFC:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120672.html

Differential Revision: https://reviews.llvm.org/D42453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327163 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 19:11:44 +00:00
Alina Sbirlea
fd10033f58 Avoid creating a Constant for each value in a ConstantDataSequential.
Summary: We create a ConstantDataSequential (ConstantDataArray or ConstantDataVector) to avoid creating a Constant for each element in an array of constants. But them in AsmPrinter, we do create a ConstantFP for each element in the ConstantDataSequential. This triggers excessive memory use when generating large global FP constants.

Reviewers: bogner, lhames, t.p.northover

Subscribers: jlebar, sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D44277

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327161 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 18:48:20 +00:00
Aditya Nandakumar
bf0554faf1 [GISel]: Add helpers for easy building G_FCONSTANT along with matchers
Added helpers to build G_FCONSTANT, along with matching ConstantFP and
unit tests for the same.

Sample usage.

auto MIB = Builder.buildFConstant(s32, 0.5); // Build IEEESingle
For Matching the above

const ConstantFP* Tmp;
mi_match(DstReg, MRI, m_GFCst(Tmp));

https://reviews.llvm.org/D44128
reviewed by: volkan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327152 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 17:31:51 +00:00
Sebastian Pop
f5ac31606c [x86][aarch64] ask the backend whether it has a vector blend instruction
The code to match and produce more x86 vector blends was enabled for all
architectures even though the transform may pessimize the code for other
architectures that do not provide a vector blend instruction.

Added an aarch64 testcase to check that a VZIP instruction is generated instead
of byte movs.

Differential Revision: https://reviews.llvm.org/D44118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327132 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-09 14:29:21 +00:00
Sameer AbuAsal
51ed40093d Propagate flags to SDValue in SplitVecOp_VECREDUCE
This patch is a fix for PR36642.

 While legalizing long vector types, make sure the smaller types get the
 flags of the wider type.

 bugzilla link: https://bugs.llvm.org/show_bug.cgi?id=36642

Change-Id: I0c2829639f094c862c10a6b51b342d4c2563e1fa

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327079 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-08 23:41:40 +00:00
Matt Davis
0c6f09c16f [DebugInfo] Add DW_AT_byte_size to vectors
Summary:
This patch adds the DW_AT_byte_size dwarf attribute to vectors.
This fixes PR21924

LLVM will round a vector up to the next alignable address, which can result in
the vector's representation in the object file being larger than what the
debugger will calculate via NumberOfElements * ElementSize. In such a case calling sizeof(MyVec) in the source will result in a different value than what a debugger might present. This situation can occur because LLVM permits non-power of two 'vector_size' attributes.

Reviewers: echristo, dexonsmith, aprantl

Reviewed By: aprantl

Subscribers: probinson, aprantl, llvm-commits, JDevlieghere

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D44048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327072 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-08 22:22:26 +00:00