Commit Graph

1061 Commits

Author SHA1 Message Date
Alina Sbirlea
1ba8ec6d05 Revert r277038 until clearing why tests fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277039 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-28 21:35:20 +00:00
Alina Sbirlea
9d612c36e2 Remove TargetBaseAlign. Keep alignment for stack adjustments.
Summary:
TargetBaseAlign is no longer required since LSV checks if target allows misaligned accesses.
A constant defining a base alignment is still needed for stack accesses where alignment can be adjusted.

Reviewers: llvm-commits, jlebar

Subscribers: mzolotukhin, arsenm

Differential Revision: https://reviews.llvm.org/D22936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277038 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-28 21:26:40 +00:00
Wei Mi
8d876fcdcd Fix the assertion error in collectLoopUniforms caused by empty Worklist before expanding.
Contributed-by: David Callahan

Differential Revision: https://reviews.llvm.org/D22886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276943 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 23:53:58 +00:00
Justin Lebar
741862c996 [LSV] Use Instruction*s rather than Value*s where possible.
Summary:
Given the crash in D22878, this patch converts the load/store vectorizer
to use explicit Instruction*s wherever possible.  This is an overall
simplification and should be an improvement in safety, as we have fewer
naked cast<>s, and now where we use Value*, we really mean something
different from Instruction*.

This patch also gets rid of some cast<>s around Value*s returned by
Builder.  Given that Builder constant-folds everything, we can't assume
much about what we get out of it.

One downside of this patch is that we have to copy our chain before
calling propagateMetadata.  But I don't think this is a big deal, as our
chains are very small (usually 2 or 4 elems).

Reviewers: asbirlea

Subscribers: mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22887

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276938 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 23:06:00 +00:00
Justin Lebar
d4f04da5fe [LSV] Don't assume that bitcast ops are Instructions.
Summary:
When we ask the builder to create a bitcast on a constant, we get back a
constant, not an instruction.

Reviewers: asbirlea

Subscribers: jholewinski, mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276922 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-27 21:45:48 +00:00
Elena Demikhovsky
ba55955caa [Loop Vectorizer] Handling loops FP induction variables.
Allowed loop vectorization with secondary FP IVs. Like this:
float *A;
float x = init;
for (int i=0; i < N; ++i) {
  A[i] = x;
  x -= fp_inc;
}

The auto-vectorization is possible when the induction binary operator is "fast" or the function has "unsafe" attribute.

Differential Revision: https://reviews.llvm.org/D21330



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276554 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-24 07:24:54 +00:00
Michael Kuperstein
e5b8fbc43a [SLPVectorizer] Vectorize reverse-order loads in horizontal reductions
When vectorizing a tree rooted at a store bundle, we currently try to sort the
stores before building the tree, so that the stores can be vectorized. For other
trees, the order of the root bundle - which determines the order of all other
bundles - is arbitrary. That is bad, since if a leaf bundle of consecutive loads
happens to appear in the wrong order, we will not vectorize it.

This is partially mitigated when the root is a binary operator, by trying to
build a "reversed" tree when that's considered profitable. This patch extends the
workaround we have for binops to trees rooted in a horizontal reduction.

This fixes PR28474.

Differential Revision: https://reviews.llvm.org/D22554


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276477 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-22 21:28:48 +00:00
Matthew Simpson
0414f48742 [LV] Move vector int induction update to end of latch
This patch moves the update instruction for vectorized integer induction phi
nodes to the end of the latch block. This ensures consistent placement of all
induction updates across all the kinds of int inductions we create (scalar,
splat vector, or vector phi).

Differential Revision: https://reviews.llvm.org/D22416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-21 21:20:15 +00:00
Adam Nemet
42a372e9b8 [OptDiag,LV] Add hotness attribute to applied-optimization remarks
Test coverage is provided by modifying the function in the FP-math
testcase that we are allowed to vectorize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276223 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-21 01:07:13 +00:00
Adam Nemet
cebe016761 [OptDiag,LV] Add hotness attribute to the derived analysis remarks
This includes FPCompute and Aliasing.

Testcase is based on no_fpmath.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276211 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 23:50:32 +00:00
Adam Nemet
957976efe6 [OptDiag,LV] Add hotness attribute to analysis remarks
The earlier change added hotness attribute to missed-optimization
remarks.  This follows up with the analysis remarks (the ones explaining
the reason for the missed optimization).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276192 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 21:44:26 +00:00
Justin Lebar
0cd5bfadb9 [LSV] Don't move stores across may-load instrs, and loosen restrictions on moving loads.
Summary:
Previously we wouldn't move loads/stores across instructions that had
side-effects, where that was defined as may-write or may-throw.  But
this is not sufficiently restrictive: Stores can't safely be moved
across instructions that may load.

This patch also adds a DEBUG check that all instructions in our chain
are either loads or stores.

Reviewers: asbirlea

Subscribers: llvm-commits, jholewinski, arsenm, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22547

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276171 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 20:07:37 +00:00
Justin Lebar
05fc242425 [LSV] Vectorize up to side-effecting instructions.
Summary:
Previously if we had a chain that contained a side-effecting
instruction, we wouldn't vectorize it at all.  Now we'll vectorize
everything that comes before the side-effecting instruction.

Reviewers: asbirlea

Subscribers: arsenm, jholewinski, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276170 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 20:07:34 +00:00
Adam Nemet
dc062efb06 [LV] Add hotness attribute to missed-optimization remarks
The new OptimizationRemarkEmitter analysis pass is hooked up to both new
and old PM passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276080 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 04:03:43 +00:00
Justin Lebar
dbf6ad39ae [LSV] Don't assume that loads/stores appear in address order in the BB.
Summary:
getVectorizablePrefix previously didn't work properly in the face of
aliasing loads/stores.  It unwittingly assumed that the loads/stores
appeared in the BB in address order.  If they didn't, it would do the
wrong thing.

Reviewers: asbirlea, tstellarAMD

Subscribers: arsenm, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276072 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 00:55:12 +00:00
Justin Lebar
85ee7e9487 [LSV] Insert stores at the right point.
Summary:
Previously, the insertion point for stores was the last instruction in
Chain *before calling getVectorizablePrefixEndIdx*.  Thus if
getVectorizablePrefixEndIdx didn't return Chain.size(), we still would
insert at the last instruction in Chain.

This patch changes our internal API a bit in an attempt to make it less
prone to this sort of error.  As a result, we end up recalculating the
Chain's boundary instructions, but I think worrying about the speed hit
of this is a premature optimization right now.

Reviewers: asbirlea, tstellarAMD

Subscribers: mzolotukhin, arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D22534

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276056 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 23:19:20 +00:00
Justin Lebar
abcf9144a5 [LSV] Use make_range, and reformat a DEBUG message. NFC
Summary:
The DEBUG message was hard to read because two Values were being printed
on the same line with only the delimiter "aliases".  This change makes
us print each Value on its own line.

Reviewers: asbirlea

Subscribers: llvm-commits, arsenm, mzolotukhin

Differential Revision: https://reviews.llvm.org/D22533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276055 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 23:19:18 +00:00
Justin Lebar
7e9ef3abf7 [LSV] Nix two global (ish) variables in the LoadStoreVectorizer. NFC
Reviewers: asbirlea

Subscribers: mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22532

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276054 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 23:19:16 +00:00
Wei Mi
92a8d601a3 Recommit the patch "Use uniforms set to populate VecValuesToIgnore".
For instructions in uniform set, they will not have vector versions so
add them to VecValuesToIgnore.
For induction vars, those only used in uniform instructions or consecutive
ptrs instructions have already been added to VecValuesToIgnore above. For
those induction vars which are only used in uniform instructions or
non-consecutive/non-gather scatter ptr instructions, the related phi and
update will also be added into VecValuesToIgnore set.

The change will make the vector RegUsages estimation less conservative.

Differential Revision: https://reviews.llvm.org/D20474

The recommit fixed the testcase global_alias.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275936 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 00:50:43 +00:00
Wei Mi
fba236f858 Revert rL275912.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275915 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-18 21:14:43 +00:00
Wei Mi
1938056381 Use uniforms set to populate VecValuesToIgnore.
For instructions in uniform set, they will not have vector versions so
add them to VecValuesToIgnore.
For induction vars, those only used in uniform instructions or consecutive
ptrs instructions have already been added to VecValuesToIgnore above. For
those induction vars which are only used in uniform instructions or
non-consecutive/non-gather scatter ptr instructions, the related phi and
update will also be added into VecValuesToIgnore set.

The change will make the vector RegUsages estimation less conservative.

Differential Revision: https://reviews.llvm.org/D20474


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275912 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-18 20:59:53 +00:00
Matthew Simpson
53352c3d28 [LV] Swap A and B in interleaved access analysis (NFC)
This patch swaps A and B in the interleaved access analysis and clarifies
related comments. The algorithm is more intuitive if we let access A precede
access B in program order rather than the reverse. This change was requested in
the review of D19984.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275567 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 15:22:43 +00:00
Matthew Simpson
d69942c12d [LV] Rename StrideAccesses to AccessStrideInfo (NFC)
We now collect all accesses with a constant stride, not just the ones with a
stride greater than one. This change was requested in the review of D19984.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275473 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14 21:05:08 +00:00
Matthew Simpson
843f7ad617 [LV] Allow interleaved accesses in loops with predicated blocks
This patch allows the formation of interleaved access groups in loops
containing predicated blocks. However, the predicated accesses are prevented
from forming groups.

Differential Revision: https://reviews.llvm.org/D19694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275471 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14 20:59:47 +00:00
Matthew Simpson
bc38653ff6 [LV] Avoid unnecessary IV scalar-to-vector-to-scalar conversions
This patch prevents increases in the number of instructions, pre-instcombine,
due to induction variable scalarization. An increase in instructions can lead
to an increase in the compile-time required to simplify the induction
variables. We now maintain a new map for scalarized induction variables to
prevent us from converting between the scalar and vector forms.

This patch should resolve compile-time regressions seen after r274627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14 14:36:06 +00:00
Alina Sbirlea
2c9bd4fc5e Extended LoadStoreVectorizer to vectorize subchains.
Summary:
LSV used to abort vectorizing a chain for interleaved load/store accesses that alias.
Allow a valid prefix of the chain to be vectorized, mark just the prefix and retry vectorizing the remaining chain.

Reviewers: llvm-commits, jlebar, arsenm

Subscribers: mzolotukhin

Differential Revision: http://reviews.llvm.org/D22119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275317 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-13 21:20:01 +00:00
David Majnemer
d232ff08a5 [LoopVectorize] Further cleanups
No functional change is intended, just a minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275243 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-13 03:24:38 +00:00
Michael Kuperstein
babacbf768 [LV] Do not invalidate use-lists we're iterating over.
Should make sanitizers happier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275230 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 23:11:34 +00:00
Michael Kuperstein
6449d7c4a9 [LV] Remove wrong assumption about LCSSA
The LCSSA pass itself will not generate several redundant PHI nodes in a single
exit block. However, such redundant PHI nodes don't violate LCSSA form, and may
be introduced by passes that preserve LCSSA, and/or preserved by the LCSSA pass
itself. So, assuming a single PHI node per exit block is not safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275217 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 21:24:06 +00:00
David Majnemer
136d48b541 [LoopVectorize] Assorted cleanups
Use range-based for loops instead of doing everything manually.
Use auto when appropriate.

No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275205 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 19:35:15 +00:00
Alina Sbirlea
334778a70b Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.

Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.

Updated testcases to reflect the changes.

Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm

Subscribers: mzolotukhin

Differential Revision: http://reviews.llvm.org/D22071

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275117 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-11 22:34:29 +00:00
Alina Sbirlea
87c883dc04 Add TLI.allowsMisalignedMemoryAccesses to LoadStoreVectorizer
Summary: Extend TTI to access TLI.allowsMisalignedMemoryAccesses(). Check condition when vectorizing load and store chains.
Add additional parameters: AddressSpace, Alignment, Fast.

Reviewers: llvm-commits, jlebar

Subscribers: arsenm, mzolotukhin

Differential Revision: http://reviews.llvm.org/D21935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275100 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-11 20:46:17 +00:00
Benjamin Kramer
a27e16e477 Give helper classes/functions internal linkage. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-10 11:28:51 +00:00
Sean Silva
89419a6ccc [PM] Port LoopVectorize to the new PM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275000 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-09 22:56:50 +00:00
Sean Silva
eb2d4257f4 [PM] Fix a think-o. mv {Scalar,Vectorize}/SLPVectorize.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274960 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-09 03:11:29 +00:00
Xinliang David Li
e042fe59dc Rename LoopAccessAnalysis to LoopAccessLegacyAnalysis /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274927 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 20:55:26 +00:00
Xinliang David Li
76a0e1d858 Remove duplicate inclusion /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274921 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 20:21:32 +00:00
Rui Ueyama
adafb27fcb Add a missing semicolon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274794 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-07 20:21:50 +00:00
Alina Sbirlea
a159545362 Clang-format LoadStoreVectorizer
Reviewers: llvm-commits, jlebar, arsenm

Subscribers: mzolotukhin

Differential Revision: http://reviews.llvm.org/D22107

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274792 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-07 20:10:35 +00:00
Elena Demikhovsky
407fc99045 Fixed a bug in vectorizing GEP before gather/scatter intrinsic.
Vectorizing GEP was incorrect and broke SSA in some cases.
 
The patch fixes PR27997 https://llvm.org/bugs/show_bug.cgi?id=27997.

Differential revision: http://reviews.llvm.org/D22035



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274735 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-07 06:06:46 +00:00
Matthew Simpson
59cdf4670f [LV] Don't widen trivial induction variables
We currently always vectorize induction variables. However, if an induction
variable is only used for counting loop iterations or computing addresses with
getelementptr instructions, we don't need to do this. Vectorizing these trivial
induction variables can create vector code that is difficult to simplify later
on. This is especially true when the unroll factor is greater than one, and we
create vector arithmetic when computing step vectors. With this patch, we check
if an induction variable is only used for counting iterations or computing
addresses, and if so, scalarize the arithmetic when computing step vectors
instead. This allows for greater simplification.

This patch addresses the suboptimal pointer arithmetic sequence seen in
PR27881.

Reference: https://llvm.org/bugs/show_bug.cgi?id=27881
Differential Revision: http://reviews.llvm.org/D21620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274627 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-06 14:26:59 +00:00
Matthew Simpson
501189216a [LV] Refactor integer induction widening (NFC)
This patch also removes the SCEV variants of getStepVector() since they have no
uses after the refactoring.

Differential Revision: http://reviews.llvm.org/D21903

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274558 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-05 15:41:28 +00:00
Matt Arsenault
c1be1f5883 LoadStoreVectorizer: Fix warning about extra semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274406 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 23:26:54 +00:00
Alina Sbirlea
1e53a5fcec Address two correctness issues in LoadStoreVectorizer
Summary:
GetBoundryInstruction returns the last instruction as the instruction which follows or end(). Otherwise the last instruction in the boundry set is not being tested by isVectorizable().
Partially solve reordering of instructions. More extensive solution to follow.

Reviewers: tstellarAMD, llvm-commits, jlebar

Subscribers: escha, arsenm, mzolotukhin

Differential Revision: http://reviews.llvm.org/D21934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274389 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 21:44:12 +00:00
Xinliang David Li
6adce0835f [PM] refactor LoopAccessInfo code part-2
Differential Revision: http://reviews.llvm.org/D21636




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274334 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 05:59:55 +00:00
Matt Arsenault
af386368d0 LoadStoreVectorizer: improvements: better pointer analysis
If OpB has an ADD NSW/NUW, we can use that to prove that adding 1
to OpA won't wrap if OpA + 1 == OpB.

Patch by Fiona Glaser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274324 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 02:16:24 +00:00
Matt Arsenault
2623a06878 LoadStoreVectorizer: Don't increase alignment with no align set
If no alignment was set on the load/stores, it would vectorize
to the new type even though this increases the default alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274323 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 02:09:38 +00:00
Matt Arsenault
d8f310cdf9 LoadStoreVectorizer: Check TTI for vec reg bit width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274322 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 02:07:22 +00:00
Matt Arsenault
0b5646a61a LoadStoreVectorizer: Fix assert when merging pointer ops
This needs to use inttoptr/ptrtoint if combining an int and pointer
load. If a pointer is used always do an integer load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274321 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 01:55:52 +00:00
Matt Arsenault
7e961b6fb8 LoadStoreVectorizer: Use AA metadata
This was not passing the full instruction with metadata
to the alias query.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274318 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-01 01:47:46 +00:00