Commit Graph

166 Commits

Author SHA1 Message Date
Matt Arsenault
73dd3b8c43 AMDGPU: Correct operand types for v_mad_mix*
These aren't really packed instructions, so the default
op_sel_hi should be 0 since this indicates a conversion.
The operand types are scalar values that behave similar
to an f16 scalar that may be converted to f32.

Doesn't change the default printing for op_sel_hi, just
the parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-30 22:18:40 +00:00
Dmitry Preobrazhensky
600899c871 [AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodes
See Bug 34152: https://bugs.llvm.org//show_bug.cgi?id=34152

Reviewers: SamWot, artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D36674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-16 13:51:56 +00:00
Eugene Zelenko
75134ec482 [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310541 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 00:46:15 +00:00
Connor Abbott
4026c85e90 [AMDGPU] Add pseudo "old" source to all DPP instructions
Summary:
All instructions with the DPP modifier may not write to certain lanes of
the output if bound_ctrl=1 is set or any bits in bank_mask or row_mask
aren't set, so the destination register may be both defined and modified.
The right way to handle this is to add a constraint that the destination
register is the same as one of the inputs. We could tie the destination
to the first source, but that would be too restrictive for some use-cases
where we want the destination to be some other value before the
instruction executes. Instead, add a fake "old" source and tie it to the
destination. Effectively, the "old" source defines what value unwritten
lanes will get. We'll expose this functionality to users with a new
intrinsic later.

Also, we want to use DPP instructions for computing derivatives, which
means we need to set WQM for them. We also need to enable the entire
wavefront when using DPP intrinsics to implement nonuniform subgroup
reductions, since otherwise we'll get incorrect results in some cases.
To accomodate this, add a new operand to all DPP instructions which will
be interpreted by the SI WQM pass. This will be exposed with a new
intrinsic later. We'll also add support for Whole Wavefront Mode later.

I also fixed llvm.amdgcn.mov.dpp to overwrite the source and fixed up
the test. However, I could also keep the old behavior (where lanes that
aren't written are undefined) if people want it.

Reviewers: tstellar, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D34716

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310283 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 19:10:56 +00:00
Dmitry Preobrazhensky
9676036f42 [AMDGPU][MC] Corrected VOP3 version of v_interp_* instructions for VI
See bug 32621: https://bugs.llvm.org//show_bug.cgi?id=32621

Reviewers: vpykhtin, SamWot, arsenm

Differential Revision: https://reviews.llvm.org/D35902

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310251 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 13:14:12 +00:00
Dmitry Preobrazhensky
13725274b0 [AMDGPU][MC] Enabled expressions as operands
See bug 33579: https://bugs.llvm.org//show_bug.cgi?id=33579

Reviewers: vpykhtin, SamWot, arsenm

Differential Revision: https://reviews.llvm.org/D36091

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 13:55:24 +00:00
Dmitry Preobrazhensky
3fa112e645 [AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifier
See bug 33591: https://bugs.llvm.org//show_bug.cgi?id=33591

Reviewers: vpykhtin, artem.tamazov, SamWot, arsenm

Differential Revision: https://reviews.llvm.org/D35424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308740 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-21 13:54:11 +00:00
Hiroshi Inoue
e3b8cd6b61 fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-16 08:11:56 +00:00
Sam Kolton
f9327929eb [AMDGPU] Assembler: refactor convert methods (VOP3 and MIMG)
Summary: Simplified converter methods for VOP3 and MIMG.

Reviewers: dp, artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, vpykhtin, t-tye

Differential Revision: https://reviews.llvm.org/D35047

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307407 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-07 15:21:52 +00:00
Dmitry Preobrazhensky
c956bf87e0 [AMDGPU][mc][gfx9] Added support of op_sel/op_sel_hi for V_MAD_MIX*
See https://bugs.llvm.org//show_bug.cgi?id=33595

Reviewers: vpykhtin, artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D35021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307402 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-07 14:29:06 +00:00
David Stuttard
dad6e61ce7 [AMDGPU] Add intrinsics for tbuffer load and store
Intrinsic already existed for llvm.SI.tbuffer.store

Needed tbuffer.load and also re-implementing the intrinsic as llvm.amdgcn.tbuffer.*

Added CodeGen tests for the 2 new variants added.
Left the original llvm.SI.tbuffer.store implementation to avoid issues with existing code

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, tpr

Differential Revision: https://reviews.llvm.org/D30687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-22 16:29:22 +00:00
Dmitry Preobrazhensky
a03e7679c5 [AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src
See Bug 33279: https://bugs.llvm.org//show_bug.cgi?id=33279

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D34003

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305915 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 14:41:34 +00:00
Sam Kolton
7ff8af4ed8 [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
Summary: Previously there were two separate pseudo instruction for SDWA on VI and on GFX9. Created one pseudo instruction that is union of both of them. Added verifier to check that operands conform either VI or GFX9.

Reviewers: dp, arsenm, vpykhtin

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, artem.tamazov

Differential Revision: https://reviews.llvm.org/D34026

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305886 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-21 08:53:38 +00:00
Matt Arsenault
f958f31ecf AMDGPU: Start adding global_* instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305838 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-20 19:54:14 +00:00
Davide Italiano
9db12e16dc [AMDGPU] Remove now dead defaultOffsetS13(). NFCI.
Fixes the GCC7 build with -Werror.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305329 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-13 22:24:24 +00:00
Matt Arsenault
4923776ab2 AMDGPU: Start adding offset fields to flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305194 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-12 15:55:58 +00:00
Dmitry Preobrazhensky
8848866f05 [AMDGPU][MC] Corrected error message for s_waitcnt helpers
See Bug 32711: https://bugs.llvm.org//show_bug.cgi?id=32711

Reviewers: artem.tamazov

Differential Revision: https://reviews.llvm.org/D33781

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304922 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 16:08:02 +00:00
Zachary Turner
19ca2b0f9d Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304864 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 03:48:56 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Konstantin Zhuravlyov
2b704b0e54 AMDGPU: Remove deprecated and unused elf definitions
Differential Revision: https://reviews.llvm.org/D33689


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304737 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-05 21:33:40 +00:00
Dmitry Preobrazhensky
4a31d77be2 [AMDGPU][MC] New syntax for ds_swizzle_b32 offset
See Bug 28601: https://bugs.llvm.org//show_bug.cgi?id=28601

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D33542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304309 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-31 16:26:47 +00:00
Sam Kolton
4abd85d7e5 [AMDGPU] SDWA: Add assembler support for GFX9
Summary:
Added separate pseudo and real instruction for GFX9 SDWA instructions.
Currently supports only in assembler.
Depends D32493

Reviewers: vpykhtin, artem.tamazov

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D33132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303620 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 10:08:55 +00:00
Dmitry Preobrazhensky
ede5ffa4d3 [AMDGPU][MC] Fixed bugs in export instruction
See Bugs 33019, 33056:
  https://bugs.llvm.org//show_bug.cgi?id=33019
  https://bugs.llvm.org//show_bug.cgi?id=33056

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D33288

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303423 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-19 13:36:09 +00:00
Dmitry Preobrazhensky
559cd48144 [AMDGPU][MC] Added arg checks for vmcnt, expcnt, lgkmcnt helpers
Summary of changes:
- corrected vmcnt, expcnt, lgkmcnt helpers to checks their argument for truncation;
- added saturated versions of these helpers.

See bug 32711 for details: https://bugs.llvm.org//show_bug.cgi?id=32711

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D32546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301439 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-26 17:55:50 +00:00
Dmitry Preobrazhensky
5cc9392ddb [AMDGPU][MC] Added check for truncation of SOPK imm operand
See bug 30827: https://bugs.llvm.org//show_bug.cgi?id=30827

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D32535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301418 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-26 15:34:19 +00:00
Dmitry Preobrazhensky
ef86a1e6af [AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class*
Fixed bug 32565: https://bugs.llvm.org//show_bug.cgi?id=32565

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300073 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-12 16:31:18 +00:00
Davide Italiano
0b798207e7 [AMDGPU] Garbage collect now unused dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299310 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 19:30:17 +00:00
Dmitry Preobrazhensky
cb5431a931 [AMDGPU][MC] Fix for Bug 28207 + LIT tests
Enabled clamp and omod for v_cvt_* opcodes which have src0 of an integer type

Reviewers: vpykhtin, arsenm

Differential Revision: https://reviews.llvm.org/D31327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298852 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-27 15:57:17 +00:00
Konstantin Zhuravlyov
f49ec0fc3f [AMDGPU] Do not emit isa info as code object metadata
- It was decided to expose this information through other means (rocr)

Differential Revision: https://reviews.llvm.org/D30970


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298560 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 23:27:09 +00:00
Konstantin Zhuravlyov
1c4f1852fb [AMDGPU] Restructure code object metadata creation
- Rename runtime metadata -> code object metadata
  - Make metadata not flow
  - Switch enums to use ScalarEnumerationTraits
  - Cleanup and move AMDGPUCodeObjectMetadata.h to AMDGPU/MCTargetDesc
  - Introduce in-memory representation for attributes
  - Code object metadata streamer
  - Create metadata for isa and printf during EmitStartOfAsmFile
  - Create metadata for kernel during EmitFunctionBodyStart
  - Finalize and emit metadata to .note during EmitEndOfAsmFile
  - Other minor improvements/bug fixes

Differential Revision: https://reviews.llvm.org/D29948



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298552 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-22 22:32:22 +00:00
Dmitry Preobrazhensky
361d156af4 [AMDGPU][MC] Fix for Bugs 28201, 28199, 28170 + LIT tests
This fix enables sp3 abs modifier with constants

Reviewers: artem.tamazov

Differential Revision: https://reviews.llvm.org/D30825

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298265 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 16:33:20 +00:00
Dmitry Preobrazhensky
194f24401f [AMDGPU][MC] Fix for Bugs 28200, 28202 + LIT tests
Fixed several related issues with VOP3 fp modifiers.

Reviewers: artem.tamazov

Differential Revision: https://reviews.llvm.org/D30821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298255 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-20 14:50:35 +00:00
Dmitry Preobrazhensky
23bacbc32a [AMDGPU][MC] Fix for Bug 30829 + LIT tests
Added code to check constant bus restrictions for VOP formats (only one SGPR value or literal-constant may be used by the instruction).
Note that the same checks are performed by SIInstrInfo::verifyInstruction (used by lowering code).
Added LIT tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296873 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-03 14:31:06 +00:00
Matt Arsenault
87fd70245a AMDGPU: Add VOP3P instruction format
Add a few non-VOP3P but instructions related to packed.

Includes hack with dummy operands for the benefit of the assembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296368 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-27 18:49:11 +00:00
Konstantin Zhuravlyov
9995ddddac [AMDGPU] Runtime metadata fixes:
- Verify that runtime metadata is actually valid runtime metadata when assembling, otherwise we could accept the following when assembling, but ocl runtime will reject it:
    .amdgpu_runtime_metadata
    { amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: ...
  - Make IsaInfo optional, and always emit it.

Differential Revision: https://reviews.llvm.org/D30349


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296324 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-27 07:55:17 +00:00
Konstantin Zhuravlyov
017228cd76 [AMDGPU] Add target information that is required by tools to metadata
Differential Revision: https://reviews.llvm.org/D28760#fb670e28


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294449 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-08 14:05:23 +00:00
Matt Arsenault
566061d5d4 AMDGPU: Fix missing static
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294281 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-07 04:37:59 +00:00
Matt Arsenault
759feefabc AMDGPU: AsmParser cleanups
Use typedef, remove unnecessary enum, line wraps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294039 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 20:49:51 +00:00
Artem Tamazov
70e6a6c2ce [AMDGPU][mc] Fix AddressSanitizer leftover issue in gfx7_asm_all test
Issue occurs when assembling "ds_ordered_count v0, v0 gds".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-03 12:47:30 +00:00
Artem Tamazov
45120444da [AMDGPU][mc] Fix memory corruption uncovered by AddressSanitizer during coverage/smoke Gfx7/8 testing.
Coverage/smoke Gfx7/8 tests were committed r292922 but then reverted
by r292974 due to AddressSanitizer failure, which is fixed by this patch.
Tests to be re-committed soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-27 22:19:42 +00:00
Eugene Zelenko
5751b552da [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292688 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-21 00:53:49 +00:00
Sam Kolton
1b647e664a [AMDGPU] Add subtarget features for SDWA/DPP
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28900

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292596 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-20 10:01:25 +00:00
Sam Kolton
9298246497 [AMDGPU] Assembler: fix v_mac_f16 immediates
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 15:26:02 +00:00
Sam Kolton
e8d33c0464 [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands
Reviewers: artem.tamazov, nhaustov, vpykhtin, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28157

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291668 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 11:46:30 +00:00
Matt Arsenault
155581a09a Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291460 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-09 18:44:11 +00:00
Evgeniy Stepanov
795e15e398 Revert "Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")"
Summary: This reverts commit r291144. It breaks build bots.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/3270, http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/2058

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:1638:12: error: could not convert ‘(const unsigned int*)(& Variants)’ from ‘const unsigned int*’ to ‘llvm::ArrayRef<unsigned int>’
     return Variants;

Reviewers: eugenis, tstellarAMD

Patch by Alex Shlyapnikov.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D28372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291168 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 19:51:13 +00:00
Matt Arsenault
5bd3cb572f Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")
Arrays are supposed to be static const

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291144 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 17:36:11 +00:00
Richard Smith
866c5c1860 Revert r291025 ("AMDGPU: Remove unneccessary intermediate vector")
This caused buildbot failures due to returning ArrayRefs referencing local
(temporary) objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291067 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-05 03:13:10 +00:00
Matt Arsenault
cc6adc86e9 AMDGPU: Remove unneccessary intermediate vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-04 22:54:10 +00:00
Artem Tamazov
097cd5f5b3 [AMDGPU][mc] Enable absolute expressions in .hsa_code_object_isa directive
Among other stuff, this allows to use predefined .option.machine_version_major
/minor/stepping symbols in the directive.

Relevant test expanded at once (also file renamed for clarity).

Differential Revision: https://reviews.llvm.org/D28140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290710 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-29 15:41:52 +00:00