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11 Commits

Author SHA1 Message Date
Eugene Zelenko
75134ec482 [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310541 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-08-10 00:46:15 +00:00
Krzysztof Parzyszek
cf138ec142 Implement LaneBitmask::getNumLanes and LaneBitmask::getHighestLane 
This should eliminate most uses of countPopulation and Log2_32 on
the lane mask values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308658 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-20 19:43:19 +00:00
Krzysztof Parzyszek
80b6fdc3a6 Use LaneBitmask::getLane in a few more places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308655 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-20 19:15:56 +00:00
Evandro Menezes
fdda7ea9d5 [CodeGen] Rename DEBUG_TYPE to match passnames 
Rename missing DEBUG_TYPE "machine-scheduler" from backend files, which were
absent from https://reviews.llvm.org/rL303921.

Differential revision: https://reviews.llvm.org/D35231

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307719 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-11 22:08:28 +00:00
Benjamin Kramer
a0f27f968e Make helper functions static. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304029 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-26 20:09:00 +00:00
Valery Pykhtin
95b4ca6d1b [AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker 
Differential revision: https://reviews.llvm.org/D33289

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303548 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-22 13:09:40 +00:00
Stanislav Mekhanoshin
791f311a49 [AMDGPU] Use GCNRPTracker dumper methods in scheduler 
Differential Revision: https://reviews.llvm.org/D33244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303186 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-16 16:31:45 +00:00
Stanislav Mekhanoshin
e61df31e20 [AMDGPU] Turn register pressure estimation into forward tracker 
This factors register pressure estimation mechanism from the
GCNSchedStrategy into the forward tracker to unify interface
with other strategies and expose it to other interested phases.

Differential Revision: https://reviews.llvm.org/D33105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303179 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-16 15:43:52 +00:00
Stanislav Mekhanoshin
f7e315844f [AMDGPU] Fixed typo in GCNRegPressure, NFC 
VGRP -> VGPR, SGRP -> SGPR

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302586 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-09 20:50:04 +00:00
Krzysztof Parzyszek
36d7c2b2e5 Move size and alignment information of regclass to TargetRegisterInfo 
1. RegisterClass::getSize() is split into two functions:
   - TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
   - TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
   - TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;

This will allow making those values depend on subtarget features in the
future.

Differential Revision: https://reviews.llvm.org/D31783


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-04-24 18:55:33 +00:00
Valery Pykhtin
4b7cf6c175 [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler 
Differential revision: https://reviews.llvm.org/D31046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298368 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-03-21 13:15:46 +00:00