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58 Commits

Author SHA1 Message Date
Dylan McKay
e42da35bfc [AVR] Use the correct register classes for 16-bit atomic operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311620 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-08-24 00:14:38 +00:00
Dylan McKay
6b35304807 [AVR] Remove the instrumentation pass 
I have a much better way of running integration tests now.

https://github.com/dylanmckay/avr-test-suite

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308857 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-23 23:39:11 +00:00
Dylan McKay
747535c69e [AVR] Improve the 'icall-func-pointer-correct-addr-space.ll' test 
Patch by Carl Peto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308856 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-23 23:00:55 +00:00
Dylan McKay
facda75cf2 [AVR] Fix a typo in the tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308148 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-16 22:31:07 +00:00
Dylan McKay
90904c693c [AVR] Fix indirect calls to function pointers 
Patch by Carl Peto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307888 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-13 08:09:36 +00:00
Dylan McKay
151ae814ed [AVR] Use the generic branch relaxer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307617 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-11 04:17:13 +00:00
Dylan McKay
5cd68f35c8 [AVR] Fix test errors due to tied operands not matching 
Broken due to r307259.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307503 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-09 16:36:35 +00:00
Dylan McKay
3a8bab032e Revert "[AVR] Add the branch selection pass from the GitHub repository" 
This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307111 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-05 00:50:56 +00:00
Dylan McKay
b95f4b6ade [AVR] Add the branch selection pass from the GitHub repository 
We should rewrite this using the generic branch relaxation pass, but for
the moment having this pass is better than hitting an assertion error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307109 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-05 00:41:19 +00:00
Dylan McKay
285f30181c [AVR] Fix bug which caused assertion errors for some FRMIDX instructions 
Previously, if a basic block ended with a FRMIDX instruction, we would
end up doing something like this.

*std::next(MBB.end())

Which would hit an error:

"Assertion `!NodePtr->isKnownSentinel()' failed."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307057 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-07-04 04:40:06 +00:00
Dylan McKay
b40677abb7 [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi 
When generating code for a shift loop, check the shift
 amount against the literal value 0, not R0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304284 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-31 06:27:46 +00:00
Dylan McKay
af4bf77761 [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot 
Contributed by Dr. Gergő Érdi.

Fixes a bug.

Raised from (https://github.com/avr-rust/rust/issues/49).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302973 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-13 00:22:34 +00:00
Dylan McKay
6804210951 [AVR] Reserve the Y register in all functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302017 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-03 11:56:01 +00:00
Dylan McKay
8c15c7ba7e [AVR] Save/restore the frame pointer for all functions 
A recent commit I made made it so that we only did this for signal or
interrupt handlers. This broke normal functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301893 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-02 01:57:48 +00:00
Dylan McKay
02f82baedd [AVR] Implement non-constant bit rotations 
This lets us do bit rotations of variable amount.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301794 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-05-01 09:48:55 +00:00
Dylan McKay
0226ba2373 [AVR] Support the LDWRdPtr instruction with the same Src+Dst register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301313 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-04-25 15:09:04 +00:00
Dylan McKay
a7de5df7fd [AVR] Remove the 'multibyte' asm test 
It tests registers which are not actually used on AVR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300684 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-04-19 12:13:45 +00:00
Dylan McKay
4c9576b0d2 [AVR] Fix the test suite 
A bunch of tests failed because memory operations have been reordered.

I am unsure which commit changed this behaviour as the AVR build was
failing at that point with an unrelated error.

This commit just reoders some of the CHECK lines in some tests to suit
current llc output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300682 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-04-19 12:02:52 +00:00
Dylan McKay
ec26388916 [AVR] Disable integrated assembler for a few tests 
Fixes the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295895 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 22:41:13 +00:00
Matthias Braun
3f55d742b2 MIRTests: Remove unnecessary 2>&1 redirection 
llc mir output goes to stdout nowadays, so the 2>&1 is not necessary
anymore for most tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295859 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 18:47:41 +00:00
Dylan McKay
92f59a0260 [AVR] Implement stacksave/stackrestore by expanding (PR31342) 
Summary:
Authored by Florian Zeitz.

This implements the missing stacksave/stackrestore intrinsics via expansion.

Output of `llc -O0 -march=avr ~/devel/llvm/test/CodeGen/Generic/stacksave-restore.ll` for sanity checking (comments mine):

```
	.text
	.file	".../llvm/test/CodeGen/Generic/stacksave-restore.ll"
	.globl	test
	.p2align	1
	.type	test,@function
test:                                   ; @test
; BB#0:
	push	r28
	push	r29

	in	r28, 61
	in	r29, 62
	sbiw	r28, 4
	in	r0, 63
	cli
	out	62, r29
	out	63, r0
	out	61, r28

	in	r18, 61
	in	r19, 62

	mov	r20, r22
	mov	r21, r23

	in	r30, 61
	in	r31, 62

	lsl	r22
	rol	r23
	lsl	r22
	rol	r23
	in	r26, 61
	in	r27, 62
	sub	r26, r22
	sbc	r27, r23
	andi	r26, 252
	in	r0, 63
	cli
	out	62, r27
	out	63, r0
	out	61, r26

	in	r0, 63
	cli
	out	62, r31
	out	63, r0
	out	61, r30

	in	r30, 61
	in	r31, 62
	sub	r30, r22
	sbc	r31, r23
	andi	r30, 252
	in	r0, 63
	cli
	out	62, r31
	out	63, r0
	out	61, r30

	std	Y+3, r24                ; 2-byte Folded Spill
	std	Y+4, r25                ; 2-byte Folded Spill

	mov	r24, r26
	mov	r25, r27

	in	r0, 63
	cli
	out	62, r19
	out	63, r0
	out	61, r18

	std	Y+1, r20                ; 2-byte Folded Spill
	std	Y+2, r21                ; 2-byte Folded Spill

	adiw	r28, 4
	in	r0, 63
	cli
	out	62, r29
	out	63, r0
	out	61, r28

	pop	r29
	pop	r28
	ret
.Lfunc_end0:
	.size	test, .Lfunc_end0-test
```

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29553

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294146 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-05 21:35:45 +00:00
Dylan McKay
cf8a46b934 [AVR] Marm MIR test functions as tracking liveness information 
This fixes an assertion error that broke three tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294140 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-05 20:25:34 +00:00
Dylan McKay
55c879f90c [AVR] Fix a bug where asm operands are printed twice 
We would unconditionally call printOperand, even if PrintAsmOperand
already printed the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294121 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-05 10:42:49 +00:00
Dylan McKay
ae27a7ca66 [AVR] Implement TargetLoweing::getRegisterByName 
This allows the use of the 'read_register' intrinsics used by clang's
named register globals features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291375 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-07 23:39:47 +00:00
Dylan McKay
3afd0d746d [AVR] Optimize 16-bit ANDs with '1' 
Summary: Fixes PR 31345

Reviewers: dylanmckay

Subscribers: fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D28186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290778 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-31 01:07:14 +00:00
Dylan McKay
54223aed57 [AVR] Optimize 16-bit ORs with '0' 
Summary: Fixes PR 31344

Authored by Anmol P. Paralkar

Reviewers: dylanmckay

Subscribers: fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D28121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290732 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-30 00:21:56 +00:00
Jun Bum Lim
4d9c93dc3f [CodeGenPrep] Skip merging empty case blocks 
This is recommit of r287553 after fixing the invalid loop info after eliminating an empty block and unit test failures in AVR and WebAssembly :

Summary: Merging an empty case block into the header block of switch could cause ISel to add COPY instructions in the header of switch, instead of the case block, if the case block is used as an incoming block of a PHI. This could potentially increase dynamic instructions, especially when the switch is in a loop. I added a test case which was reduced from the benchmark I was targetting.

Reviewers: t.p.northover, mcrosier, manmanren, wmi, joerg, davidxl

Subscribers: joerg, qcolombet, danielcdh, hfinkel, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22696

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289988 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-16 20:38:39 +00:00
Dylan McKay
df654b6d91 [AVR] Add a test for 64-bit left shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289936 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-16 11:40:00 +00:00
Dylan McKay
74a7d891d9 [AVR] Support floats in the instrumention pass 
This also refactors some common code into the 'GetTypeName' method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289803 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-15 11:02:41 +00:00
Dylan McKay
732b1bee27 [AVR] Add a function instrumentation pass 
This will be used for an on-chip test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289641 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-14 10:15:00 +00:00
Dylan McKay
590fc8edc9 [AVR] Add an 'relax memory operation' pass 
Summary:
This pass will be used to relax instructions which use out of bounds
memory accesses to equivalent operations that can work with the
addresses.

The pass currently implements relaxation for the STDWPtrQRr instruction.

Without this pass, an assertion error would be hit in the pseudo expansion pass.

In the future, we will need to add more instructions to this pass. We can do
that on a case-by-case basic.

Reviewers: arsenm, kparzysz

Subscribers: wdng, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D27650

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289517 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-13 05:53:14 +00:00
Dylan McKay
15d7b5d79e [AVR] Add calling convention CodeGen tests 
This adds CodeGen tests for the AVR C calling convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289369 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-11 07:09:45 +00:00
Dylan McKay
b966884b95 [AVR] Add a test to validate a simple 'blinking led' program 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289362 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-11 04:59:39 +00:00
Dylan McKay
08e478d45a [AVR] Fix and clean up the inline assembly tests 
There was a bug where we would hit an assertion if 'Q' was used as a
constraint.

I also removed hardcoded register names to prefer regexes so the tests
don't break when the register allocator changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289325 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-10 11:49:07 +00:00
Dylan McKay
c2e1f83474 [AVR] Explicitly set the target in all CodeGen tests 
This seems to have caused failures on the buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289324 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-10 11:23:16 +00:00
Dylan McKay
c7e7557a51 [AVR] Use the register scavenger when expanding 'LDDW' instructions 
Summary: This gets rid of the hardcoded 'r0' that was used previously.

Reviewers: asl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289322 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-10 10:51:55 +00:00
Dylan McKay
4195c1c939 [AVR] Support stores to undefined pointers 
This would previously trigger an assertion error in AVRISelDAGToDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289321 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-10 10:16:13 +00:00
Dylan McKay
5aeda31aad [AVR] Remove a set of redundant tests 
This fixes the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289201 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-09 11:22:26 +00:00
Dylan McKay
153fa865c6 [AVR] Add tests for a large number of pseudo instructions 
This adds MIR tests for 24 pseudo instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289191 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-09 07:49:04 +00:00
Dylan McKay
8f6ef5fefd [AVR] Add MIR tests for pseudo instruction expansions 
This adds tests for 13 pseudo instruction expansions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289039 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-08 10:52:13 +00:00
Dylan McKay
119507f5af [AVR] Add MIR tests for a few pseudo instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289031 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-08 08:54:41 +00:00
Dylan McKay
038449d896 [AVR] Expand 'SELECT_CC' nodes whereever possible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288905 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-07 12:34:47 +00:00
Dylan McKay
f7450dd95f [AVR] Move a pseudo expansion test into a folder 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288899 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-07 11:21:45 +00:00
Dylan McKay
0007d14057 [AVR] Allow loading from stack slots where src and dest registers are identical 
Fixes PR 31256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288897 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-07 11:08:56 +00:00
Dylan McKay
a31bc24eae [AVR] Remove 'XFAIL' from a CodeGen test 
This seems to be fixed as of r288052.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288618 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-04 09:50:42 +00:00
Dylan McKay
e0c0f7aed4 Un-XFAIL an AVR CodeGen test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287958 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-11-26 01:07:32 +00:00
Dylan McKay
eef324fa60 [AVR] Mark the 'select-must-add-unconditional-jump' test as 'XFAIL' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287871 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-11-24 12:38:54 +00:00
Dylan McKay
b8248feef5 [AVR] Remove some accidentally-commited code that broke the bots 
This is a remnant of an on-chip unit testing tool that has since been
moved out-of-tree.

It was accidentally committed in r287162.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287180 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-11-17 00:09:38 +00:00
Dylan McKay
ca6e81b65f [AVR] Fix basic block naming in ctlz and cttz tests 
The branch selector would change the names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287174 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-11-16 22:48:38 +00:00
Dylan McKay
08c9ce1ff0 [AVR] Add tests for counting leading/trailing zeros 
This adds two test files that verify the 'cttz' and 'ctlz' operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287172 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-11-16 22:38:43 +00:00