4 Commits

Author	SHA1	Message	Date
Kyle Butt	011a826e4f	CodeGen: Power: Add lowering for shifts of v1i128. ... When legalizing vector operations on vNi128, they will be split to v1i128 because that is a legal type on ppc64, but then the compiler will crash in selection dag because it fails to select for these operations. This patch fixes shift operations. Logical shift right and left shift can be performed in the vector unit, but algebraic shift right requires being split. Differential Revision: https://reviews.llvm.org/D32774 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303307 91177308-0d34-0410-b5e6-96231b3b80d8	2017-05-17 21:54:41 +00:00
Ehsan Amiri	38caf19333	Adding -verify-machineinstrs option to PowerPC tests ... Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277624 91177308-0d34-0410-b5e6-96231b3b80d8	2016-08-03 18:17:35 +00:00
Dan Gohman	fce288fc91	Eliminate more uses of llvm-as and llvm-dis. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8	2009-09-09 00:09:15 +00:00
Dan Gohman	9ed06db5c8	Add support for lowering 128-bit shifts on ppc64. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8	2008-03-07 20:36:53 +00:00