Commit Graph

6 Commits

Author SHA1 Message Date
Sanjay Patel
3e50893e8e Specify triple so 'make check' passes on darwin x86-64
The check lines were added with:
http://reviews.llvm.org/rL256458
http://reviews.llvm.org/rL256460

but on a darwin target, the output looks like:
  ## InlineAsm Start
  rorq  %rdi
  ## InlineAsm End
  ## InlineAsm Start
  rorq  %rsi
  ## InlineAsm End
  leaq  (%rsi,%rdi), %rax
  retq




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-28 18:28:44 +00:00
David Majnemer
13f5e7d35c Make the test properly constrained
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-27 06:26:41 +00:00
David Majnemer
2b72c52b3f Try to passify buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256458 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-27 06:18:48 +00:00
Dan Gohman
36a0947820 Eliminate more uses of llvm-as and llvm-dis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:54:48 +00:00
Evan Cheng
e6f350d755 Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0            = MOV %reg1025

If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 21:34:07 +00:00
Evan Cheng
fb11288109 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 08:01:15 +00:00