Commit Graph

111 Commits

Author SHA1 Message Date
Hiroshi Inoue
9066b8af33 [PowerPC] fix broken JIT-compiled code with tail call optimization
The relocation for branch instructions in the dynamic loader of ExecutionEngine assumes branch instructions with R_PPC64_REL24 relocation type are only bl. However, with the tail call optimization, b instructions can be also used to jump into another function.
This patch makes the relocation to keep bits in the branch instruction other than the jump offset to avoid relocation rewrites a b instruction into bl.

Differential Revision: https://reviews.llvm.org/D47456



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333502 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-30 04:48:29 +00:00
Lang Hames
60b28ca5a7 [RuntimeDyld][MachO] Add support for MachO::ARM64_RELOC_POINTER_TO_GOT reloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333130 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-23 21:27:07 +00:00
Lang Hames
99deb0bcb1 [RuntimeDyld][MachO] Properly handle thumb to thumb calls within a section.
Previously thumb bits were only checked for external relocations (thumb to arm
code and vice-versa). This patch adds detection for thumb callees in the same
section asthe (also thumb) caller.

The MachO/Thumb test case is updated to cover this, and redundant checks
(handled by the MachO/ARM test) are removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331838 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-09 01:38:13 +00:00
Krasimir Georgiev
eec140da52 [RuntimeDyld][PowerPC] Fix a newly added test in r329355
Summary: The bit widths are wrong.

Reviewers: bkramer, lhames, hans

Reviewed By: hans

Subscribers: hans, nemanjai, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D45361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329573 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-09 14:29:23 +00:00
Lang Hames
396d590dbf [RuntimeDyld][PowerPC] Add a test case for r329335.
Checks that calls to different sections go to the function's global entry point,
rather than the local one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329355 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-05 21:56:55 +00:00
Lang Hames
7db8ad4adc [RuntimeDyld][MachO] Fix assertion in encodeAddend, add missing directive to
test case.

r326290 fixed the assertion for decodeAddend, but not encodeAddend. The
regression test failed to catch this because it was missing the
subsections_via_symbols flag, so the desired relocation was not applied.

This patch also fixes the formatting of the assertion from r326290.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326406 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-01 01:44:33 +00:00
Lang Hames
d53cdbf4cc [RuntimeDyld][MachO] Support ARM64_RELOC_BRANCH26 for BL instructions by
relaxing an assertion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326290 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-28 00:58:21 +00:00
Frederich Munch
2bbb2bdf2e Handle IMAGE_REL_AMD64_ADDR32NB in RuntimeDyldCOFF
Summary:
IMAGE_REL_AMD64_ADDR32NB relocations are currently set to zero in all cases.
This patch sets the relocation to the correct value when possible and shows an error when not.

Reviewers: enderby, lhames, compnerd

Reviewed By: compnerd

Subscribers: LepelTsmok, compnerd, martell, llvm-commits

Differential Revision: https://reviews.llvm.org/D30709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325700 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-21 17:18:20 +00:00
Francis Visoiu Mistrih
ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Nitesh Jain
ce20559b07 [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld.
Reviewers: sdardis

Subscribers: jaydeep, bhushan, llvm-commits

Differential Revision: https://reviews.llvm.org/D38314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316287 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-22 09:47:41 +00:00
Saleem Abdulrasool
2ac0f38d31 ExecutionEngine: adjust COFF i386 tautological asserts
Modify static_casts to not be tautological in some COFF i386
relocations.

Patch by Alex Langford!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316169 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 16:57:40 +00:00
Shoaib Meenai
d8da420012 [ExecutionEngine] Correct the size of a write in a COFF i386 relocation
We want to be writing a 32bit value, so we should be writing 4 bytes
instead of 2.

Patch by Alex Langford <apl@fb.com>.

Differential Revision: https://reviews.llvm.org/D38872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315964 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-17 01:41:14 +00:00
Saleem Abdulrasool
26d9773dd7 Revert "Revert "ExecutionEngine: add R_AARCH64_ABS{16,32}""
This reverts commit SVN r313668.  The original test case attempted to
write a pointer value into 16-bits, although the value may exceed the
range representable in 16-bits.  Ensure that the symbol is located in
the address space such that its absolute address is representable in
16-bits.  This should fix the assertion failure that was seen on the
Windows hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313822 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-20 21:32:44 +00:00
Saleem Abdulrasool
3a6eaef3cc Revert "ExecutionEngine: add R_AARCH64_ABS{16,32}"
This reverts commit SVN r313654.  Seems that it is triggering an
assertion on Windows specifically.  Revert until I can build on Windows
and look into what is happening there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313668 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-19 20:35:25 +00:00
Saleem Abdulrasool
0cb391043b ExecutionEngine: add R_AARCH64_ABS{16,32}
Add support for the R_AARCH64_ABS{16,32} relocations in the execution
engine.  This is primarily used for DWARF debug information relocations
and needed by the LLVM JIT to support JITing for lldb.

Patch by Alex Langford!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313654 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-19 18:00:50 +00:00
Oliver Stannard
e8fad78d5a [AsmParser] Recommit: Hash is not a comment on some targets
Re-committing after r311325 fixed an unintentional use of '#' comments in
clang.

The '#' token is not a comment for all targets (on ARM and AArch64 it marks an
immediate operand), so we shouldn't treat it as such.

Comments are already converted to AsmToken::EndOfStatement by
AsmLexer::LexLineComment, so this check was unnecessary.

Differential Revision: https://reviews.llvm.org/D36405



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311326 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-21 09:58:37 +00:00
Kuba Mracek
fbd10c199d Get rid of some more "%T" expansions, see <https://reviews.llvm.org/D35396>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311293 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-20 17:00:08 +00:00
Kuba Mracek
ea54773994 [llvm] Get rid of "%T" expansions
The %T lit expansion expands to a common directory shared between all the tests in the same directory, which is unexpected and unintuitive, and more importantly, it's been a source of subtle race conditions and flaky tests. In https://reviews.llvm.org/D35396, it was agreed that it would be best to simply ban %T and only keep %t, which is unique to each test. When a test needs a temporary directory, it can just create one using mkdir %t.

This patch removes %T in llvm.

Differential Revision: https://reviews.llvm.org/D36495



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310953 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-15 20:29:24 +00:00
Ahmed Bougacha
a65cb63a72 Revert "[AsmParser] Hash is not a comment on some targets"
This reverts commit r310457.

It causes clang-produced IR to fail llvm codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310662 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 21:23:00 +00:00
Lang Hames
2c350aa3d3 [RuntimeDyld][ORC] Add support for Thumb mode to RuntimeDyldMachOARM.
This patch adds support for thumb relocations to RuntimeDyldMachOARM, and adds
a target-specific flags field to JITSymbolFlags (so that on ARM we can record
whether each symbol is Thumb-mode code).

RuntimeDyldImpl::emitSection is modified to ensure that stubs memory is
correctly aligned based on the size returned by getStubAlignment().



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310517 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 20:19:27 +00:00
Oliver Stannard
a90acae41c [AsmParser] Hash is not a comment on some targets
The '#' token is not a comment for all targets (on ARM and AArch64 it marks an
immediate operand), so we shouldn't treat it as such.

Comments are already converted to AsmToken::EndOfStatement by
AsmLexer::LexLineComment, so this check was unnecessary.

Differential Revision: https://reviews.llvm.org/D36405



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310457 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 09:40:51 +00:00
Rafael Espindola
2600a677c9 Don't pass the code model to MC
I was surprised to see the code model being passed to MC. After all,
it assembles code, it doesn't create it.

The one place it is used is in the expansion of .cfi directives to
handle .eh_frame being more that 2gb away from the code.

As far as I can tell, gnu assembler doesn't even have an option to
enable this. Compiling a c file with gcc -mcmodel=large produces a
regular looking .eh_frame. This is probably because in practice linker
parse and recreate .eh_frames.

In llvm this is used because the JIT can place the code and .eh_frame
very far apart. Ideally we would fix the jit and delete this
option. This is hard.

Apart from confusion another problem with the current interface is
that most callers pass CodeModel::Default, which is bad since MC has
no way to map it to the target default if it actually needed to.

This patch then replaces the argument with a boolean with a default
value. The vast majority of users don't ever need to look at it. In
fact, only CodeGen and llvm-mc use it and llvm-mc just to enable more
testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309884 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-02 20:32:26 +00:00
Pavel Labath
28aa6e3bb4 [RuntimeDyld] Fix debug section relocation (pr20457)
Summary:
Debug info sections, (or non-SHF_ALLOC sections in general) should be
linked as if their load address was zero to emulate the behavior of the
static linker.

This bug was discovered because it was breaking lldb expression evaluation on
linux.

Reviewers: lhames

Subscribers: aprantl, eugene, clayborg, lldb-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D32899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303239 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-17 08:47:28 +00:00
Eugene Leviant
3523e86a0b RuntimeDyldELF/AArch64: Implement basic GOT support
This patch implements two GOT relocations:
R_AARCH64_ADR_GOT_PAGE and R_AARCH64_LD64_GOT_LO12_NC

Differential revision: https://reviews.llvm.org/D28571


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294191 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-06 15:31:28 +00:00
Will Dietz
876a1ad124 Test RuntimeDyld doesn't crash with R_X86_64_NONE (r293388).
Largely based on LLD test for dtrace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293451 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-30 01:28:42 +00:00
Eugene Leviant
9c3e633489 RuntimeDyldELF: add LDST128_ABS_LO12_NC reloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292788 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-23 13:52:08 +00:00
Eugene Leviant
ece7697261 RuntimeDyldELF: add LDST8_ABS_LO12_NC and LDST16_ABS_LO12_NC relocs
Differential revision: https://reviews.llvm.org/D28863


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292785 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-23 13:13:47 +00:00
Eugene Leviant
2d0a1dd417 RuntimeDyldELF: implement R_AARCH64_PREL64 reloc
Differential revision: https://reviews.llvm.org/D28122


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291558 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 11:05:30 +00:00
Eugene Leviant
9be988aa91 RuntimeDyldELF: add missing test cases for AArch64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291438 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-09 11:47:33 +00:00
Eugene Leviant
0f4cbb99e9 RuntimeDyldELF: don't create thunk if not needed
This patch doesn't create thunk for branch operation when following conditions are met:
- Architecture is AArch64
- Relocation target is in the same object file
- Relocation target is close enough to be encoded in immediate offset

In such case we branch directly to the target instead of branching to thunk

Differential revision: https://reviews.llvm.org/D28108


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291431 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-09 09:56:31 +00:00
Eugene Leviant
9b804c5b0a RuntimeDyldELF: add R_AARCH64_ADD_ABS_LO12_NC reloc
Differential revision: https://reviews.llvm.org/D28115


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290598 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-27 09:51:38 +00:00
Yichao Yu
e012a3d747 Fix R_AARCH64_MOVW_UABS_G3 relocation
Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....)

Reviewers: t.p.northover, lhames

Subscribers: davide, aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D27609

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289880 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 22:36:53 +00:00
Davide Italiano
8eb98effd1 Make this test Windows-only (try to placate buildbots).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285931 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-03 16:43:10 +00:00
Davide Italiano
fade6c26a0 [RuntimeDyld] Move an X86 only test to the correct directory.
This is an attempt to placate the bots after r285841.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285859 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-02 21:05:42 +00:00
Keno Fischer
a5f79d9770 Fix PREL31 relocation on ARM
Summary:
This is a 31bits relative relocation instead of a 32bits absolute relocation.

Reviewers: t.p.northover, peter.smith, rengolin

Subscribers: aemerson, llvm-commits, samparker

Differential Revision: https://reviews.llvm.org/D25069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284780 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-20 21:15:29 +00:00
Simon Dardis
f7463aa366 [mips][mcjit] Add the majority of N32 support.
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.

Patch by: Daniel Sanders


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284724 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-20 13:02:23 +00:00
Walter Erquinigo
f68eeb3359 Handle relocations to thumb functions when dynamic linking COFF modules
Summary:
This adds the necessary logic to support relocations to thumb functions in the COFF dynamic linker.
The jumps to function addresses are mostly blx, which requires the ISA selection bit when jumping to a thumb function.

Note: I'm determining if the relocation requires the ISA bit when creating the relocation entries and not when resolving the relocation. I have to do that because I need the ObjectFile and the actual Symbol, which are available only when creating the entries. It would require a gross refactor if I do it otherwise, but I'm okay with doing it if you think it's better.

Reviewers: peter.smith, compnerd

Subscribers: rengolin, sas

Differential Revision: https://reviews.llvm.org/D25151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284410 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-17 18:56:18 +00:00
Saleem Abdulrasool
294618592b ExecutionEngine: fix a bug in the movt/movw relocator
According to the arm arm specifications, 4 bytes are needed for a shift instead
of 8, this was causing the movt instruction to write to a different register
sometimes.

Patch by Walter Erquinigo!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280005 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-29 20:42:03 +00:00
Saleem Abdulrasool
4d45f1ed0d X86: handle external tail calls in Windows JIT
If there was a tail call, we would incorrectly handle the relocation.  It would
end up indexing into the array with an incorrect section id.  The symbol was
external to the module, so the Section ID was UNDEFINED (-1).  We would then
index the SmallVector with this ID, triggering an assertion.  Use the Value
rather than the section load address in this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275442 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-14 17:27:06 +00:00
Saleem Abdulrasool
7fb006603a ExecutionEngine: add preliminary support for COFF ARM
This adds rudimentary support for COFF ARM to the dynamic loader for the
exeuction engine.  This can be used by lldb to JIT code into a COFF ARM
environment.  This lays the foundation for the loader, though a few of the
relocation types are yet unhandled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273682 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 14:11:44 +00:00
Rafael Espindola
3be11e69ac Change the default of -relax-relocations.
llvm-mc is a developer tool, as such it make sense for it to use new
features by default.

This doesn't change the user facing clang, which still defaults to non
relaxable relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273014 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-17 17:04:56 +00:00
Reid Kleckner
71b1fedfef [PATCH] Fix RuntimeDyldCOFFI386 to handle relocations with a non-zero addend
This fixes IMAGE_REL_I386_DIR32, IMAGE_REL_I386_DIR32NB,
IMAGE_REL_I386_SECREL, and IMAGE_REL_I386_REL32 relocations.

Based on patch by Jon Turney <jon.turney@dronecode.org.uk>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272911 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-16 16:21:41 +00:00
Sagar Thakur
805f1b70c4 [MIPS][LLVM-MC] Fix Disassemble of Negative Offset
Patch by Nitesh Jain.

Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.

Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270542 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-24 09:57:10 +00:00
Lang Hames
8c34a3f83c [RuntimeDyld][MachO] Add support for SUBTRACTOR relocations between anonymous
symbols on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270157 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-19 23:26:05 +00:00
Rafael Espindola
214e8d3f06 Don't pass relocation-model= to tests that don't need it.
Very few things in MC itself use the option. Most of the code that that
uses it could be move to CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269871 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 00:27:17 +00:00
Steven Wu
1c60c02881 Disable test from r269436 on unsupported platforms
Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s
requires SystemZ backend. Mark the test as unsupported if the backend is not
available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269470 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 20:10:51 +00:00
Bryan Chan
d80276dc1b [RuntimeDyld] Support R_390_PC64 relocation type
Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.

Reviewers: uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20033

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269436 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 17:23:48 +00:00
Davide Italiano
b50e1f0066 [RuntimeDyldELF] Handle GOTPCRELX/REX_GOTPCRELX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267309 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-24 01:36:37 +00:00
Lang Hames
88ffce3c57 [RuntimeDyld][MachO] Fix handling of empty eh-frame sections.
This patch switches from an unguarded to a guarded loop for eh-frame record
fixups. In the unguarded version we would always make at least one call to
processFDE, which would then crash trying to fix up a frame that didn't exist.

Fixes <rdar://problem/24301582>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259103 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 22:35:48 +00:00
Lang Hames
1a9ebde7e0 [RuntimeDyld][AArch64] Add support for the MachO ARM64_RELOC_SUBTRACTOR reloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258438 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-21 21:59:50 +00:00