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271 Commits

Author SHA1 Message Date
Dmitry Preobrazhensky
3ab6afc6d2 [AMDGPU][MC] Enabled parsing of relocations on VALU instructions 
See bug 37566: https://bugs.llvm.org/show_bug.cgi?id=37566

Reviewers: artem.tamazov, arsenm, nhaehnle

Differential Revision: https://reviews.llvm.org/D47884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334622 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-06-13 17:02:03 +00:00
Dmitry Preobrazhensky
d77bb599aa [AMDGPU][MC][GFX8][GFX9] Allow LDS direct reads for BUFFER_LOAD_DWORDX2/X3/X4 
See bug 37653: https://bugs.llvm.org/show_bug.cgi?id=37653

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D47885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334609 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-06-13 15:32:46 +00:00
Konstantin Zhuravlyov
db963fc642 AMDGPU: Add 64-bit relative variant kind 
Differential Revision: https://reviews.llvm.org/D47601


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334443 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-06-11 21:37:57 +00:00
Konstantin Zhuravlyov
c924185571 AMDGPU: Fix v_dot{4, 8}* instruction encoding 
Differential Revision: https://reviews.llvm.org/D46848


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332387 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-05-15 19:32:47 +00:00
Konstantin Zhuravlyov
0511853bbf AMDGPU: Add D16 instructions preserve unused bits feature 
- Predicate D16 patterns on this new feature
- Added this new feature to gfx900/2/4

Differential Revision: https://reviews.llvm.org/D46366


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331551 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-05-04 20:06:57 +00:00
Konstantin Zhuravlyov
53f34ec97a AMDGPU: Remove remnants of gfx901 (it was deprecated some time ago) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331298 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-05-01 18:47:48 +00:00
Konstantin Zhuravlyov
abd1045068 AMDGPU: Add missing gfx904 tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331284 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-05-01 17:05:44 +00:00
Matt Arsenault
ac9b3ef76a AMDGPU: Add Vega12 and Vega20 
Changes by
  Matt Arsenault
  Konstantin Zhuravlyov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331215 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-30 19:08:16 +00:00
Dmitry Preobrazhensky
3210e64b49 [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32 
See bug 36356: https://bugs.llvm.org/show_bug.cgi?id=36356

Differential Revision: https://reviews.llvm.org/D45446

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330123 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-16 12:41:38 +00:00
Dmitry Preobrazhensky
7cb386167d [AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32 
See bug 36845: https://bugs.llvm.org/show_bug.cgi?id=36845

Differential Revision: https://reviews.llvm.org/D45443

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329801 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-11 13:13:30 +00:00
Konstantin Zhuravlyov
419eb8a73e AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header 
1. Remove max_scratch_backing_memory_byte_size from kernel header
2. Make it a reserved field
3. Ignore it while parsing assembly for backwards compatibility
4. Bump up minor version of kernel header

Differential Revision: https://reviews.llvm.org/D45452


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329620 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-09 20:47:22 +00:00
Dmitry Preobrazhensky
4f1ff651c8 [AMDGPU][MC][GFX9] Added instructions s_mul_hi_*32, s_lshl*_add_u32 
See bugs
  36841: https://bugs.llvm.org/show_bug.cgi?id=36841
  36842: https://bugs.llvm.org/show_bug.cgi?id=36842

Differential Revision: https://reviews.llvm.org/D45251

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329562 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-09 13:10:33 +00:00
Dmitry Preobrazhensky
7ba710792a [AMDGPU][MC][GFX9] Added s_call_b64 
See bug 36843: https://bugs.llvm.org/show_bug.cgi?id=36843

Differential Revision: https://reviews.llvm.org/D45268

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329440 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-06 18:24:49 +00:00
Dmitry Preobrazhensky
a708d8da8f [AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_done 
See bug 36844: https://bugs.llvm.org/show_bug.cgi?id=36844

Differential Revision: https://reviews.llvm.org/D45313

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329430 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-06 17:25:00 +00:00
Dmitry Preobrazhensky
04f5112d69 [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate* 
See bug 36840: https://bugs.llvm.org/show_bug.cgi?id=36840

Differential Revision: https://reviews.llvm.org/D45250

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329419 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-06 16:35:11 +00:00
Dmitry Preobrazhensky
730ed467c7 [AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions 
See bug 36839: https://bugs.llvm.org/show_bug.cgi?id=36839

Differential Revision: https://reviews.llvm.org/D45249

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329408 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-06 15:48:39 +00:00
Dmitry Preobrazhensky
bf596a2e06 [AMDGPU][MC][GFX9] Added s_dcache_discard* instructions 
See bug 36838: https://bugs.llvm.org/show_bug.cgi?id=36838

Differential Revision: https://reviews.llvm.org/D45247

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329397 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-06 15:08:42 +00:00
Dmitry Preobrazhensky
1669069e0a [AMDGPU][MC] Enabled instruction TBUFFER_LOAD_FORMAT_XYZ for SI/CI 
See bug 36958: https://bugs.llvm.org/show_bug.cgi?id=36958

Differential Revision: https://reviews.llvm.org/D45099

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329197 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-04 13:54:55 +00:00
Dmitry Preobrazhensky
112f4caf3f [AMDGPU][MC] Added support of 3-element addresses for MIMG instructions 
See bug 35999: https://bugs.llvm.org/show_bug.cgi?id=35999

Differential Revision: https://reviews.llvm.org/D45084

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329187 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-04 13:01:17 +00:00
Dmitry Preobrazhensky
6c25c75a69 [AMDGPU][MC][GFX9] Added instructions v_cvt_norm_*16_f16, v_sat_pk_u8_i16 
See bug 36847: https://bugs.llvm.org/show_bug.cgi?id=36847

Differential Revision: https://reviews.llvm.org/D45097

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328988 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-02 17:09:20 +00:00
Dmitry Preobrazhensky
eb4d4bc552 [AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions 
Fixed a bug which caused Tablegen crash.

See bug 36837: https://bugs.llvm.org/show_bug.cgi?id=36837

Differential Revision: https://reviews.llvm.org/D45085

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328983 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-02 16:10:25 +00:00
Nico Weber
58ab7f7e03 Revert r328975, it makes TableGen assert on the bots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328978 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-02 14:20:23 +00:00
Dmitry Preobrazhensky
ddc3770228 [AMDGPU][MC][GFX9] Added s_atomic_* and s_buffer_atomic_* instructions 
See bug 36837: https://bugs.llvm.org/show_bug.cgi?id=36837

Differential Revision: https://reviews.llvm.org/D45085

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328975 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-04-02 13:52:23 +00:00
Dmitry Preobrazhensky
3bce2685f1 [AMDGPU][MC] Added ds_add_src2_f32 
See bug 36833: https://bugs.llvm.org/show_bug.cgi?id=36833

Differential Revision: https://reviews.llvm.org/D44779

Reviewers: arsenm, artem.tamazov, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328713 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-28 16:21:56 +00:00
Dmitry Preobrazhensky
4288e700e0 [AMDGPU][MC] Added PCK variants of image load/store instructions 
See bug 36834: https://bugs.llvm.org/show_bug.cgi?id=36834

Differential Revision: https://reviews.llvm.org/D44795

Reviewers: artem.tamazov, arsenm, timcorringham, nhaehnle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328710 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-28 15:44:16 +00:00
Dmitry Preobrazhensky
19a26aafdb [AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x 
See bug 36835: https://bugs.llvm.org/show_bug.cgi?id=36835

Differential Revision: https://reviews.llvm.org/D44825

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328707 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-28 14:53:13 +00:00
Dmitry Preobrazhensky
1a79b71466 [AMDGPU][MC][GFX9] Added s_scratch* instructions 
See bug 36836: https://bugs.llvm.org/show_bug.cgi?id=36836

Differential Revision: https://reviews.llvm.org/D44832

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328704 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-28 14:08:03 +00:00
Tim Corringham
476b2588b1 [AMDGPU] Improve disassembler error handling 
Summary:
llvm-objdump now disassembles unrecognised opcodes as data, using
the .long directive. We treat unrecognised opcodes as being 32 bit
values, so move along 4 bytes rather than the single byte which
previously resulted in a cascade of bogus disassembly following an
unrecognised opcode.

While no solution can always disassemble code that contains
embedded data correctly this provides a significant improvement.

The disassembler will now cope with an arbitrary length section
as it no longer truncates it to a multiple of 4 bytes, and will
use the .byte directive for trailing bytes.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D44685

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328553 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-26 17:06:33 +00:00
Dmitry Preobrazhensky
a5e8c708f7 [AMDGPU][MC][GFX8][GFX9][DISASSEMBLER] Added "_e32" suffix to 32-bit VINTRP opcodes 
See bug 36751: https://bugs.llvm.org/show_bug.cgi?id=36751

Differential Revision: https://reviews.llvm.org/D44529

Reviewers: artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327723 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-16 16:38:04 +00:00
Dmitry Preobrazhensky
835a08c7cc [AMDGPU][MC] Corrected default values for unused SDWA operands 
See bug 36355:  https://bugs.llvm.org/show_bug.cgi?id=36355

Differential Revision: https://reviews.llvm.org/D44481

Reviewers: artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327720 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-16 15:40:27 +00:00
Dmitry Preobrazhensky
db98ce7419 [AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction 
See bug 36558: https://bugs.llvm.org/show_bug.cgi?id=36558

Differential Revision: https://reviews.llvm.org/D43950

Reviewers: artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327299 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-12 17:29:24 +00:00
Dmitry Preobrazhensky
a70206a47a [AMDGPU][MC] Corrected GATHER4 opcodes 
See bug 36252: https://bugs.llvm.org/show_bug.cgi?id=36252

Differential Revision: https://reviews.llvm.org/D43874

Reviewers: artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327278 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-12 15:03:34 +00:00
Stanislav Mekhanoshin
0dc2b94c4e [AMDGPU] Add default ISA version targets 
In case if -mattr used to modify feature set bits in llvm-mc call
getIsaVersion can fail to identify specific ISA due to test mismatch.
Adding default fallback tests which will always correctly report at
least major version.

Differential Revision: https://reviews.llvm.org/D44163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326825 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-03-06 18:33:55 +00:00
Dmitry Preobrazhensky
6387958567 [AMDGPU][MC] Added lds support for MUBUF instructions 
See bug 28234: https://bugs.llvm.org/show_bug.cgi?id=28234

Differential Revision: https://reviews.llvm.org/D43472

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325676 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-02-21 13:13:48 +00:00
Konstantin Zhuravlyov
4bf0aa0c17 AMDGPU: Bring processors and features in sync with the spec 
- Remove gfx800
- Make iceland gfx802
- Add xnack to gfx902

Differential Revision: https://reviews.llvm.org/D43355


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325393 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-02-16 21:26:25 +00:00
Dmitry Preobrazhensky
13db890d32 [AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier 
See bug 36154: https://bugs.llvm.org/show_bug.cgi?id=36154

Differential Revision: https://reviews.llvm.org/D42847

Reviewers: cfang, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324237 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-02-05 14:18:53 +00:00
Dmitry Preobrazhensky
dfc05c7fc8 [AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodes 
See bugs 36094, 36095:
  https://bugs.llvm.org/show_bug.cgi?id=36094
  https://bugs.llvm.org/show_bug.cgi?id=36095

Differential Revision: https://reviews.llvm.org/D42692

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324231 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-02-05 12:45:43 +00:00
Dmitry Preobrazhensky
334d2239fa [AMDGPU][MC] Corrected parsing of image opcode modifiers r128 and d16 
See bugs 36092, 36093:
    https://bugs.llvm.org/show_bug.cgi?id=36092
    https://bugs.llvm.org/show_bug.cgi?id=36093

Differential Revision: https://reviews.llvm.org/D42583

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323651 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-29 14:20:42 +00:00
Dmitry Preobrazhensky
c9091f8a06 [AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe) 
See bug 36000: https://bugs.llvm.org/show_bug.cgi?id=36000

Differential Revision: https://reviews.llvm.org/D42483

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323538 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-26 16:42:51 +00:00
Dmitry Preobrazhensky
7393afb964 [AMDGPU][MC] Added support of 64-bit image atomics 
See bug 35998: https://bugs.llvm.org/show_bug.cgi?id=35998

Differential Revision: https://reviews.llvm.org/D42469

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323534 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-26 15:43:29 +00:00
Dmitry Preobrazhensky
bfe367d1e2 [AMDGPU][MC] Corrected parsing of image modifiers and encoding of image atomics 
See bugs
    35962: https://bugs.llvm.org/show_bug.cgi?id=35962
    35963: https://bugs.llvm.org/show_bug.cgi?id=35963

Differential Revision: https://reviews.llvm.org/D42184

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322942 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-19 13:49:53 +00:00
Dmitry Preobrazhensky
351eabaab7 [AMDGPU][MC][GFX9] Enable inline constants for SDWA operands 
See bug 35771: https://bugs.llvm.org/show_bug.cgi?id=35771

Differential Revision: https://reviews.llvm.org/D42058

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322655 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-17 14:00:48 +00:00
Stanislav Mekhanoshin
f20c58e01b [AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32 
Differential Revision: https://reviews.llvm.org/D41617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322500 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-15 18:49:15 +00:00
Changpeng Fang
d6fbd6ac45 AMDGPU/SI: Add d16 support for buffer intrinsics. 
Differential Revision:
  https://reviews.llvm.org/D38906

Reviewers:
  Matt and Brian.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322402 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-12 21:12:19 +00:00
Dmitry Preobrazhensky
18ab0b4852 [AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support 
See bug 35764: https://bugs.llvm.org/show_bug.cgi?id=35764

Differential Revision: https://reviews.llvm.org/D41614

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322189 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-01-10 14:22:19 +00:00
Dmitry Preobrazhensky
088d53ac92 [AMDGPU][MC] Incorrect parsing of flat/global atomic modifiers 
See bug 35730: https://bugs.llvm.org/show_bug.cgi?id=35730

Differential Revision: https://reviews.llvm.org/D41598

Reviewers: vpykhtin, artem.tamazov, arsenm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321552 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-12-29 13:55:11 +00:00
Dmitry Preobrazhensky
c1fce707b0 [AMDGPU][MC] Corrected handling of negative expressions 
See bug 35716: https://bugs.llvm.org/show_bug.cgi?id=35716

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41488

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321372 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-12-22 18:03:35 +00:00
Dmitry Preobrazhensky
ddf9b26bf8 [AMDGPU][MC] Corrected parsing of optional operands for ds_swizzle_b32 
See bug 35645: https://bugs.llvm.org/show_bug.cgi?id=35645

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321367 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-12-22 17:13:28 +00:00
Dmitry Preobrazhensky
c428d374bf [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers 
See bug 35561: https://bugs.llvm.org/show_bug.cgi?id=35561

This patch also affects implementation of SGPR and VGPR registers though changes are cosmetic.

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D41437

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321359 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-12-22 15:18:06 +00:00
Matt Arsenault
365773b3bf [AMDGPU, AsmParser] Enable the mnemonic spell corrector. 
Patch by Dmitry Venikov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321202 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-12-20 18:52:57 +00:00