Commit Graph

26188 Commits

Author SHA1 Message Date
Sanjay Patel
e5a55cebc1 [DAGCombiner] narrow shuffle of concatenated vectors
// shuffle (concat X, undef), (concat Y, undef), Mask -->
// concat (shuffle X, Y, Mask0), (shuffle X, Y, Mask1)

The ARM changes with 'vtrn' and narrowed 'vuzp' are improvements.

The x86 changes look neutral or better. There's one test with an
extra instruction, but that could be reversed for a subtarget with
the right attributes. But by default, we want to avoid the 256-bit
op when possible (in my motivating benchmark, a handful of ymm ops
sprinkled into a sequence of xmm ops are triggering frequency
throttling on Haswell resulting in significantly worse perf).

Differential Revision: https://reviews.llvm.org/D60545

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358291 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 16:31:56 +00:00
Hiroshi Yamauchi
aae02cfe3c Add options for MaxLoadsPerMemcmp(OptSize).
Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60587

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358287 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 15:05:46 +00:00
Hans Wennborg
0366e3e181 Revert r358268 "[DebugInfo] DW_OP_deref_size in PrologEpilogInserter."
It causes clang to crash while building Chromium. See https://crbug.com/952230
for reproducer.

> The PrologEpilogInserter need to insert a DW_OP_deref_size before
> prepending a memory location expression to an already implicit
> expression to avoid having the existing expression act on the memory
> address instead of the value behind it.
>
> The reason for using DW_OP_deref_size and not plain DW_OP_deref is that
> big-endian targets need to read the right size as simply truncating a
> larger read would yield the wrong result (LSB bytes are not at the lower
> address).
>
> Differential Revision: https://reviews.llvm.org/D59687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358281 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 12:54:52 +00:00
Fangrui Song
e6cd4757bf Use llvm::upper_bound. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358277 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 11:31:16 +00:00
Markus Lavin
bcae242878 [DebugInfo] DW_OP_deref_size in PrologEpilogInserter.
The PrologEpilogInserter need to insert a DW_OP_deref_size before
prepending a memory location expression to an already implicit
expression to avoid having the existing expression act on the memory
address instead of the value behind it.

The reason for using DW_OP_deref_size and not plain DW_OP_deref is that
big-endian targets need to read the right size as simply truncating a
larger read would yield the wrong result (LSB bytes are not at the lower
address).

Differential Revision: https://reviews.llvm.org/D59687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358268 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 08:23:55 +00:00
Eric Christopher
d46ddf0061 Add explicit dependencies on MCSection.h and MCDwarf.h to the .cpp
files rather than rely on transitive includes from MCStreamer.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358263 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 07:40:01 +00:00
Craig Topper
3f8580a865 [TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes.
If the upper bits of the SHL result aren't used, we might be able to use a narrower shift. For example, on X86 this can turn a 64-bit into 32-bit enabling a smaller encoding.

Differential Revision: https://reviews.llvm.org/D60358

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358257 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 06:49:28 +00:00
Eric Christopher
7e7105bd03 Move addFrameInst out of line and remove the MCDwarf.h include.
This removes 500 transitive dependencies for a modification of
MCDwarf.h in a build of llc for a single out of line function
and reduces the build overhead by more than half without impacting
test time of check-llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358255 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 06:31:59 +00:00
Eric Christopher
0c40f6d128 Include what's used in a few cpp files - these were getting transitive
includes from MCDwarf.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358254 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 06:16:33 +00:00
Fangrui Song
66987a8d19 Use llvm::lower_bound. NFC
This reapplies rL358161. That commit inadvertently reverted an exegesis file to an old version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358246 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-12 02:02:06 +00:00
Brendon Cahoon
0cd628a5aa [Pipeliner] Fix incorrect loop carried dependence calculation
The isLoopCarriedDep function does not correctly compute loop
carried dependences when the array index offset is negative
or the stride is smallar than the access size.

Patch by Denis Antrushin.

Differential Revision: https://reviews.llvm.org/D60135



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358233 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 21:57:51 +00:00
Ali Tamur
8c653aebb3 Revert "Use llvm::lower_bound. NFC"
This reverts commit rL358161.

This patch have broken the test:
llvm/test/tools/llvm-exegesis/X86/uops-CMOV16rm-noreg.s

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358199 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 17:35:20 +00:00
Sanjay Patel
bc87fa30f7 [DAGCombiner] refactor narrowing of extracted vector binop; NFC
There's a TODO comment about handling patterns with insert_subvector,
and we do want to match that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358187 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 15:59:47 +00:00
Sanjay Patel
8e4da35c4a [DAGCombiner][x86] scalarize inserted vector FP ops
// bo (build_vec ...undef, x, undef...), (build_vec ...undef, y, undef...) -->
// build_vec ...undef, (bo x, y), undef...

The lifetime of the nodes in these examples is different for variables versus constants,
but they are all build vectors briefly, so I'm proposing to catch them in this form to
handle all of the leading examples in the motivating test file.

Before we have build vectors, we might have insert_vector_element. After that, we might
have scalar_to_vector and constant pool loads.

It's going to take more work to ensure that FP vector operands are getting simplified
with undef elements, so this transform can apply more widely. In a non-loose FP environment,
we are likely simplifying FP elements to NaN values rather than undefs.

We also need to allow more opcodes down this path. Eg, we don't handle FP min/max flavors
yet.

Differential Revision: https://reviews.llvm.org/D60514

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358172 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 14:21:57 +00:00
Fangrui Song
a5919957f1 Use llvm::lower_bound. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358161 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 10:25:41 +00:00
Shiva Chen
209d9a9a8d [RISCV] Put data smaller than eight bytes to small data section
Because of gp = sdata_start_address + 0x800, gp with signed twelve-bit offset
could covert most of the small data section. Linker relaxation could transfer
the multiple data accessing instructions to a gp base with signed twelve-bit
offset instruction.

Differential Revision: https://reviews.llvm.org/D57493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358150 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-11 04:59:13 +00:00
Amara Emerson
250ffab4a2 [AArch64][GlobalISel] Scalarize vector SDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358142 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 23:06:08 +00:00
David Green
45a375eb6b Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg
Certain optimisations from ConstantHoisting and CGP rely on Selection DAG not
seeing through to the constant in other blocks. Revert this patch while we come
up with a better way to handle that.

I will try to follow this up with some better tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358113 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 18:00:41 +00:00
Matt Arsenault
fff0af4260 GlobalISel: Move computeValueLLTs
Call lowering should use this directly instead of going through the
EVT version, but more work is needed to deal with this (mostly the
passing of the IR type pointer instead of the relevant properties in
ArgInfo).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358111 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 17:27:56 +00:00
Matt Arsenault
dc5d59bf21 GlobalISel: Fix invoke lowering creating invalid type registers
Unlike the call handling, this wasn't checking for void results and
creating a register with the invalid LLT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358110 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 17:27:55 +00:00
Matt Arsenault
9b41947020 GlobalISel: Support legalizing G_CONSTANT with irregular breakdown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358109 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 17:27:53 +00:00
Matt Arsenault
1963c0bccb GlobalISel: Handle odd breakdowns for bit ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358105 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 17:07:56 +00:00
Nick Desaulniers
a943056482 [AsmPrinter] refactor to remove remove AsmVariant. NFC
Summary:
The InlineAsm::AsmDialect is only required for X86; no architecture
makes use of it and as such it gets passed around between arch-specific
and general code while being unused for all architectures but X86.

Since the AsmDialect is queried from a MachineInstr, which we also pass
around, remove the additional AsmDialect parameter and query for it deep
in the X86AsmPrinter only when needed/as late as possible.

This refactor should help later planned refactors to AsmPrinter, as this
difference in the X86AsmPrinter makes it harder to make AsmPrinter more
generic.

Reviewers: craig.topper

Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, peter.smith, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60488

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358101 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 16:38:43 +00:00
Fangrui Song
5abf2be60c [MachineOutliner] Replace ostringstream based string concatenation with Twine
This makes my libLLVMCodeGen.so.9svn 4936 bytes smaller.

While here, delete unused #include <map>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358089 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 14:52:37 +00:00
David Stenberg
ceea708d56 [DebugInfo] Track multiple registers in DbgEntityHistoryCalculator
Summary:
When calculating the debug value history, DbgEntityHistoryCalculator
would only keep track of register clobbering for the latest debug value
per inlined entity. This meant that preceding register-described debug
value fragments would live on until the next overlapping debug value,
ignoring any potential clobbering. This patch amends
DbgEntityHistoryCalculator so that it keeps track of all registers that
a inlined entity's currently live debug values are described by.

The DebugInfo/COFF/pieces.ll test case has had to be changed since
previously a register-described fragment would incorrectly outlive its
basic block.

The parent patch D59941 is expected to increase the coverage slightly,
as it makes sure that location list entries are inserted after clobbered
fragments, and this patch is expected to decrease it, as it stops
preceding register-described from living longer than they should. All in
all, this patch and the preceding patch has a negligible effect on the
output from `llvm-dwarfdump -statistics' for a clang-3.4 binary built
using the RelWithDebInfo build profile. "Scope bytes covered" increases
by 0.5%, and "variables with location" increases from 2212083 to
2212088, but it should improve the accuracy quite a bit.

This fixes PR40283.

Reviewers: aprantl, probinson, dblaikie, rnk, bjope

Reviewed By: aprantl

Subscribers: llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59942

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358073 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 11:28:28 +00:00
David Stenberg
4281d3e410 [DebugInfo] Improve handling of clobbered fragments
Summary:
Currently the DbgValueHistorymap only keeps track of clobbered registers
for the last debug value that it has encountered. This could lead to
preceding register-described debug values living on longer in the
location lists than they should. See PR40283 for an example.  This
patch does not introduce tracking of multiple registers, but changes
the DbgValueHistoryMap structure to allow for that in a follow-up
patch. This patch is not NFC, as it at least fixes two bugs in
DwarfDebug (both are covered in the new clobbered-fragments.mir test):

* If a debug value was clobbered (its End pointer set), the value would
  still be added to OpenRanges, meaning that the succeeding location list
  entries could potentially contain stale values.

* If a debug value was clobbered, and there were non-overlapping
  fragments that were still live after the clobbering, DwarfDebug would
  not create a location list entry starting directly after the
  clobbering instruction. This meant that the location list could have
  a gap until the next debug value for the variable was encountered.

Before this patch, the history map was represented by <Begin, End>
pairs, where a new pair was created for each new debug value. When
dealing with partially overlapping register-described debug values, such
as in the following example:

  DBG_VALUE $reg2, $noreg, !1, !DIExpression(DW_OP_LLVM_fragment, 32, 32)
  [...]
  DBG_VALUE $reg3, $noreg, !1, !DIExpression(DW_OP_LLVM_fragment, 64, 32)
  [...]
  $reg2 = insn1
  [...]
  $reg3 = insn2

the history map would then contain the entries `[<DV1, insn1>, [<DV2, insn2>]`.
This would leave it up to the users of the map to be aware of
the relative order of the instructions, which e.g. could make
DwarfDebug::buildLocationList() needlessly complex. Instead, this patch
makes the history map structure monotonically increasing by dropping the
End pointer, and replacing that with explicit clobbering entries in the
vector. Each debug value has an "end index", which if set, points to the
entry in the vector that ends the debug value. The ending entry can
either be an overlapping debug value, or an instruction which clobbers
the register that the debug value is described by. The ending entry's
instruction can thus either be excluded or included in the debug value's
range. If the end index is not set, the debug value that the entry
introduces is valid until the end of the function.

Changes to test cases:

 * DebugInfo/X86/pieces-3.ll: The range of the first DBG_VALUE, which
   describes that the fragment (0, 64) is located in RDI, was
   incorrectly ended by the clobbering of RAX, which the second
   (non-overlapping) DBG_VALUE was described by. With this patch we
   get a second entry that only describes RDI after that clobbering.

 * DebugInfo/ARM/partial-subreg.ll: This test seems to indiciate a bug
   in LiveDebugValues that is caused by it not being aware of fragments.
   I have added some comments in the test case about that. Also, before
   this patch DwarfDebug would incorrectly include a register-described
   debug value from a preceding block in a location list entry.

Reviewers: aprantl, probinson, dblaikie, rnk, bjope

Reviewed By: aprantl

Subscribers: javed.absar, kristof.beyls, jdoerfert, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358072 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 11:28:20 +00:00
Fangrui Song
dc11e109be [AsmPrinter] Delete unused RangeSpanList::addRange
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358068 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 10:35:10 +00:00
David Stenberg
e2477cfa4b [DebugInfo] Rename DbgValueHistoryMap::{InstrRange -> Entry}, NFC
Summary:
In an upcoming commit the history map will be changed so that it
contains explicit entries for instructions that clobber preceding debug
values, rather than Begin- End range pairs, so generalize the name to
"Entry".

Also, prefix the iterator variable names in buildLocationList() with
"E". In an upcoming commit the entry will have query functions such as
"isD(e)b(u)gValue", which could at a glance make one confuse it for
iterations over MachineInstrs, so make the iterator names a bit more
distinct to avoid that.

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358060 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 09:07:43 +00:00
David Stenberg
b4b762c592 [DebugInfo] Make InstrRange into a class, NFC
Summary:
Replace use of std::pair by creating a class for the debug value
instruction ranges instead. This is a preparatory refactoring for
improving handling of clobbered fragments.

In an upcoming commit the Begin pointer will become a PointerIntPair, so
it will be cleaner to have a getter for that.

Reviewers: aprantl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358059 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 09:07:32 +00:00
Florian Hahn
1fa9e79ea1 [ScheduleDAG] Add statistics for maintaining the topological order.
This is helpful to measure the impact of D60125 on maintaining
topological orders.

Reviewers: MatzeB, atrick, efriedma, niravd

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D60187

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358058 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-10 09:03:03 +00:00
Amara Emerson
e5bb56cb3c [GlobalISel][AArch64] Allow CallLowering to handle types which are normally
required to be passed as different register types. E.g. <2 x i16> may need to
be passed as a larger <2 x i32> type, so formal arg lowering needs to be able
truncate it back. Likewise, when dealing with returns of these types, they need
to be widened in the appropriate way back.

Differential Revision: https://reviews.llvm.org/D60425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358032 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 21:22:33 +00:00
Craig Topper
b77427871e [DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immediate RHS to SADDO by negating the immediate.
This lines up with what we do for regular subtract and it matches up better with X86 assumptions in isel patterns that add with immediate is more canonical than sub with immediate.

Differential Revision: https://reviews.llvm.org/D60020

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358027 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 18:33:56 +00:00
Simon Pilgrim
0c7bc1e6bb [TargetLowering] SimplifyDemandedBits - add ISD::INSERT_SUBVECTOR support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358019 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 16:52:21 +00:00
Stanislav Mekhanoshin
f53ab9d6ab Revert LIS handling in MachineDCE
One of out of tree targets has regressed with this patch. Reverting
it for now and let liveness to be fully reconstructed in case pass
was used after the LIS is created to resolve the regression.

Differential Revision: https://reviews.llvm.org/D60466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358015 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 16:13:53 +00:00
Simon Pilgrim
f312d38896 [TargetLowering] SimplifyDemandedBits - Remove GetDemandedSrcMask lambda. NFCI.
An older version of this could return false but now that this always succeeds we can just inline and simplify it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357999 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 12:29:26 +00:00
Simon Pilgrim
6aaa856e17 [TargetLowering] SimplifyDemandedBits - call SimplifyDemandedBits in bitcast handling
When bitcasting from a source op to a larger bitwidth op, split the demanded bits and OR them on top of one another and demand those merged bits in the SimplifyDemandedBits call on the source op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357992 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 10:27:59 +00:00
David Stenberg
5fe9706e7f [DebugInfo] Pass all values in DebugLocEntry's constructor, NFC
Summary:
With MergeValues() removed, amend DebugLocEntry's constructor so that it
takes multiple values rather than a single, and keep non-fragment values
in OpenRanges, as this allows some cleanup of the code in
buildLocationList().

Reviewers: aprantl, dblaikie, loladiro

Reviewed By: aprantl

Subscribers: hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59303

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357988 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 10:08:26 +00:00
David Stenberg
f19c9f4fa3 [DebugInfo] Remove redundant DebugLocEntry::MergeValues() function, NFC
Summary:
The MergeValues() function would try to merge two entries if they shared
the same beginning label. Having the same beginning label means that the
former entry's range would be empty; however, after D55919 we no longer
create entries for empty ranges, so we can no longer land in a situation
where that check in MergeValues would succeed. Instead, the "merging" is
done by keeping the live values from the preceding empty ranges in
OpenRanges, and adding them to the first non-empty range.

Reviewers: aprantl, dblaikie, loladiro

Reviewed By: aprantl

Subscribers: llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D59301

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357974 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-09 07:46:09 +00:00
Simon Pilgrim
a2b71f96a9 [TargetLowering] SimplifyDemandedBits - use DemandedElts in bitcast handling
Be more selective in the SimplifyDemandedBits -> SimplifyDemandedVectorElts bitcast call based on the demanded elts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357942 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-08 20:59:38 +00:00
Adrian Prantl
f09c6d5b71 Add LLVM IR debug info support for Fortran COMMON blocks
COMMON blocks are a feature of Fortran that has no direct analog in C languages, but they are similar to data sections in assembly language programming. A COMMON block is a named area of memory that holds a collection of variables. Fortran subprograms may map the COMMON block memory area to their own, possibly distinct, non-empty list of variables. A Fortran COMMON block might look like the following example.

    COMMON /ALPHA/ I, J

    For this construct, the compiler generates a new scope-like DI construct (!DICommonBlock) into which variables (see I, J above) can be placed. As the common block implies a range of storage with global lifetime, the !DICommonBlock refers to a !DIGlobalVariable. The Fortran variable that comprise the COMMON block are also linked via metadata to offsets within the global variable that stands for the entire common block.

    @alpha_ = common global %alphabytes_ zeroinitializer, align 64, !dbg !27, !dbg !30, !dbg !33
    !14 = distinct !DISubprogram(…)
    !20 = distinct !DICommonBlock(scope: !14, declaration: !25, name: "alpha")
    !25 = distinct !DIGlobalVariable(scope: !20, name: "common alpha", type: !24)
    !27 = !DIGlobalVariableExpression(var: !25, expr: !DIExpression())
    !29 = distinct !DIGlobalVariable(scope: !20, name: "i", file: !3, type: !28)
    !30 = !DIGlobalVariableExpression(var: !29, expr: !DIExpression())
    !31 = distinct !DIGlobalVariable(scope: !20, name: "j", file: !3, type: !28)
    !32 = !DIExpression(DW_OP_plus_uconst, 4)
    !33 = !DIGlobalVariableExpression(var: !31, expr: !32)

    The DWARF generated for this is as follows.

    DW_TAG_common_block:
    DW_AT_name: alpha
    DW_AT_location: @alpha_+0
    DW_TAG_variable:
    DW_AT_name: common alpha
    DW_AT_type: array of 8 bytes
    DW_AT_location: @alpha_+0
    DW_TAG_variable:
    DW_AT_name: i
    DW_AT_type: integer*4
    DW_AT_location: @Alpha+0
    DW_TAG_variable:
    DW_AT_name: j
    DW_AT_type: integer*4
    DW_AT_location: @Alpha+4

Patch by Eric Schweitz!

Differential Revision: https://reviews.llvm.org/D54327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357934 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-08 19:13:55 +00:00
Simon Pilgrim
3ae5d6c4c4 [DAG] Pull out ComputeNumSignBits call to make debugging easier. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357861 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-07 11:49:33 +00:00
Stanislav Mekhanoshin
5d206b6327 [AMDGPU] Add MachineDCE pass after RenameIndependentSubregs
Detect dead lanes can create some dead defs. Then RenameIndependentSubregs
will break a REG_SEQUENCE which may use these dead defs. At this point
a dead instruction can be removed but we do not run a DCE anymore.

MachineDCE was only running before live variable analysis. The patch
adds a mean to preserve LiveIntervals and SlotIndexes in case it works
past this.

Differential Revision: https://reviews.llvm.org/D59626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357805 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 20:11:32 +00:00
Fangrui Song
360e56327d Change some dyn_cast to more apropriate isa. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357773 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 16:16:23 +00:00
Simon Pilgrim
4cd136da59 [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC
Second half of PR40800, this patch adds DAG undef handling to fcmp instructions to match the behavior in llvm::ConstantFoldCompareInstruction, this permits constant folding of vector comparisons where some elements had been reduced to UNDEF (by SimplifyDemandedVectorElts etc.).

This involves a lot of tweaking to reduced tests as bugpoint loves to reduce fcmp arguments to undef........

Differential Revision: https://reviews.llvm.org/D60006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357765 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 14:56:21 +00:00
Matt Arsenault
bd19ebc5d8 GlobalISel: Add another overload of buildUnmerge
It's annoying to have to create an array of the result type,
particularly when you don't care about the size of the value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357763 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 14:03:07 +00:00
Sanjay Patel
a61c373e87 [DAGCombiner][x86] scalarize splatted vector FP ops
There are a variety of vector patterns that may be profitably reduced to a
scalar op when scalar ops are performed using a subset (typically, the
first lane) of the vector register file.

For x86, this is true for float/double ops and element 0 because
insert/extract is just a sub-register rename.

Other targets should likely enable the hook in a similar way.

Differential Revision: https://reviews.llvm.org/D60150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357760 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 13:32:17 +00:00
Piotr Sobczak
959b42493f [SelectionDAG] Compute known bits of CopyFromReg
Summary:
Teach SelectionDAG how to compute known bits of ISD::CopyFromReg if
the virtual reg used has one def only.

This can be particularly useful when calling isBaseWithConstantOffset()
with the ISD::CopyFromReg argument, as more optimizations may get enabled
in the result.

Also add a missing truncation on X86, found by testing of this patch.

Change-Id: Id1c9fceec862d118c54a5b53adf72ada5d6daefa

Reviewers: bogner, craig.topper, RKSimon

Reviewed By: RKSimon

Subscribers: lebedev.ri, nemanjai, jvesely, nhaehnle, javed.absar, jsji, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357745 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 07:44:09 +00:00
Serguei Katkov
f708c59106 [FastISel] Fix crash for gc.relocate lowring
Lowering safepoint checks that all gc.relocaes observed in safepoint
must be lowered. However Fast-Isel is able to skip dead gc.relocate.

To resolve this issue we just ignore dead gc.relocate in the check.

Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D60184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357742 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-05 05:41:08 +00:00
Eric Christopher
7cc761f09b NFC: Move API uses of MD5::MD5Result to Optional rather than a pointer.
Differential Revision: https://reviews.llvm.org/D60290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357736 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-04 23:34:38 +00:00
Evandro Menezes
d71ea05ab7 [IR] Refactor attribute methods in Function class (NFC)
Rename the functions that query the optimization kind attributes.

Differential revision: https://reviews.llvm.org/D60287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357731 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-04 22:40:06 +00:00