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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
170 lines
4.4 KiB
C++
170 lines
4.4 KiB
C++
//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise hardware features such as
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// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_TARGETPARSER_H
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#define LLVM_SUPPORT_TARGETPARSER_H
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// FIXME: vector is used because that's what clang uses for subtarget feature
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// lists, but SmallVector would probably be better
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/ARMTargetParser.h"
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#include "llvm/Support/AArch64TargetParser.h"
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#include <vector>
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namespace llvm {
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class StringRef;
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// Target specific information in their own namespaces.
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// (ARM/AArch64 are declared in ARM/AArch64TargetParser.h)
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// These should be generated from TableGen because the information is already
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// there, and there is where new information about targets will be added.
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// FIXME: To TableGen this we need to make some table generated files available
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// even if the back-end is not compiled with LLVM, plus we need to create a new
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// back-end to TableGen to create these clean tables.
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namespace X86 {
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorVendors : unsigned {
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VENDOR_DUMMY,
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#define X86_VENDOR(ENUM, STRING) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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VENDOR_OTHER
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorTypes : unsigned {
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CPU_TYPE_DUMMY,
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#define X86_CPU_TYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_TYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as its included by clang
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// as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorSubtypes : unsigned {
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CPU_SUBTYPE_DUMMY,
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#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
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ENUM,
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#include "llvm/Support/X86TargetParser.def"
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CPU_SUBTYPE_MAX
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};
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// This should be kept in sync with libcc/compiler-rt as it should be used
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// by clang as a proxy for what's in libgcc/compiler-rt.
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enum ProcessorFeatures {
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#define X86_FEATURE(VAL, ENUM) \
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ENUM = VAL,
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#include "llvm/Support/X86TargetParser.def"
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};
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} // namespace X86
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namespace AMDGPU {
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/// GPU kinds supported by the AMDGPU target.
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enum GPUKind : uint32_t {
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// Not specified processor.
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GK_NONE = 0,
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// R600-based processors.
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GK_R600 = 1,
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GK_R630 = 2,
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GK_RS880 = 3,
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GK_RV670 = 4,
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GK_RV710 = 5,
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GK_RV730 = 6,
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GK_RV770 = 7,
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GK_CEDAR = 8,
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GK_CYPRESS = 9,
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GK_JUNIPER = 10,
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GK_REDWOOD = 11,
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GK_SUMO = 12,
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GK_BARTS = 13,
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GK_CAICOS = 14,
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GK_CAYMAN = 15,
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GK_TURKS = 16,
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GK_R600_FIRST = GK_R600,
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GK_R600_LAST = GK_TURKS,
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// AMDGCN-based processors.
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GK_GFX600 = 32,
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GK_GFX601 = 33,
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GK_GFX700 = 40,
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GK_GFX701 = 41,
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GK_GFX702 = 42,
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GK_GFX703 = 43,
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GK_GFX704 = 44,
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GK_GFX801 = 50,
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GK_GFX802 = 51,
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GK_GFX803 = 52,
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GK_GFX810 = 53,
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GK_GFX900 = 60,
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GK_GFX902 = 61,
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GK_GFX904 = 62,
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GK_GFX906 = 63,
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GK_GFX909 = 65,
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GK_AMDGCN_FIRST = GK_GFX600,
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GK_AMDGCN_LAST = GK_GFX909,
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};
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/// Instruction set architecture version.
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struct IsaVersion {
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unsigned Major;
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unsigned Minor;
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unsigned Stepping;
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};
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// This isn't comprehensive for now, just things that are needed from the
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// frontend driver.
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enum ArchFeatureKind : uint32_t {
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FEATURE_NONE = 0,
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// These features only exist for r600, and are implied true for amdgcn.
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FEATURE_FMA = 1 << 1,
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FEATURE_LDEXP = 1 << 2,
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FEATURE_FP64 = 1 << 3,
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// Common features.
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FEATURE_FAST_FMA_F32 = 1 << 4,
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FEATURE_FAST_DENORMAL_F32 = 1 << 5
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};
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StringRef getArchNameAMDGCN(GPUKind AK);
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StringRef getArchNameR600(GPUKind AK);
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StringRef getCanonicalArchName(StringRef Arch);
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GPUKind parseArchAMDGCN(StringRef CPU);
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GPUKind parseArchR600(StringRef CPU);
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unsigned getArchAttrAMDGCN(GPUKind AK);
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unsigned getArchAttrR600(GPUKind AK);
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void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
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void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
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IsaVersion getIsaVersion(StringRef GPU);
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} // namespace AMDGPU
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} // namespace llvm
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#endif
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